University of Toronto ECE532 Digital Hardware Lab 1 Building a MicroBlaze System in XPS Version 1 4 For EDK 6 2i 8 15 2004 Acknowledgement This lab is derived from a Xilinx lab given at the University of Toronto EDK workshop in November 2003 Many thanks to Xilinx for allowing us to use and modify their material Goals Use Xilinx tools to build and debug a basic MicroBlaze system This will consist of a MicroBlaze processor memory and a UART Understand basic concepts of the Xilinx Embedded Development Kit EDK which includes tools such as Xilinx Platform Studio XPS and processor IP Explore some concepts used when programming in an embedded processor environment such as where a program is loaded how it is loaded what gets added to your basic program runtimes etc how to interact with it Use some software debugging tools in an embedded processor environment Requirements Access to EDK 6 2i and the Xilinx Multimedia development board Preparation You should have a quick look at the following documents Links to them are available on the course web site EST Tools Guide especially the sections on the GNU Compiler Tools and GNU Debugger sources redhat com insight describes the GUI interface to GDB MicroBlaze Processor Reference Guide The assembly language and instructions are described here Training Lecture These are the slides used at the Xilinx workshop Flipping through them may be useful 1 University of Toronto ECE532 Digital Hardware Lab 1 Building a MicroBlaze System in XPS Note Some of the activity in this lab does not require hardware and can be done later such as examining various files If time is running short it is best to leave these steps till later and focus on the steps that actually use the hardware Background Building a system manually for the 1st time can be tedious but Base System Builder BSB a wizard in XPS can help to build your 1st system quickly and easily XPS uses the Xilinx Integrated Software Environment ISE tools to synthesize place and route the hardware design GNU tools are provided in the EDK and are used within XPS to build the software for an embedded MicroBlaze system Setup In your kit you should have the following hardware Xilinx Virtex II Multimedia Board Xilinx Parallel Cable 4 Straight thru serial cable or use a null modem adapter Power cable Step by step Setting up the Hardware connections for the Multimedia Board Please be very careful when setting up the hardware so as not to break the connectors Do not power on the board until a TA has verified your hardware setup 1 Place the Multimedia board on the table such that you can read the Xilinx insignia in the bottom right hand corner 2 Attach the flying leads cable to the Parallel Cable IV pod such that the red JTAG SERIAL lead is furthest away from you and the pod is faced so you can read the labels The leads provide a JTAG connection that is used for downloading FPGA configurations and debugging 3 Connect the cable from the pod to the parallel cable from the computer and the smaller lead to the adaptor dangling from the back of the computer The smaller lead provides power to the pod The status light on the pod should now be lit orange 2 University of Toronto ECE532 Digital Hardware Lab 1 Building a MicroBlaze System in XPS 4 At the top left hand corner of the gizmo board there are two grey cables labeled CON and D Unplug the CON cable and connect it to the serial cable adaptor Plug the other end of the serial cable into the connector located at the top left hand side of the board just below the power switch This will be used for your UART connection a CONPORT 5 Plug one end of the power supply into the power bar and the other into the jack located in the top left hand corner just above the power switch 6 Get a TA to check your connections You can then turn on the power switch ON and OFF are marked The LEDs on the board should now be on and many are likely flashing Using XPS Base System Builder 7 Create a project directory for your labs in your home directory W in the Windows directory system Make sure that the path has no spaces In this directory copy the lab1 directory from X Courseware Xilinx 6 2i User Area 8 Start XPS by going to the Courseware folder and selecting the Xilinx 6 2i directory Select the Xilinx Embedded Development Kit 6 2 folder and double click on the Xilinx Platform Studio icon 9 Select the File menu select New Project select Base System Builder A Create New Project Using Base System Builder Wizard dialog box is displayed 10 Browse to the directory named lab1 you copied into your project work area and select it in the dialog box Click Open on the dialog box to select the directory 11 Click OK on the Create New Project dialog box to start building the project A Base System Builder Select Board dialog box is displayed This may take a few minutes 12 Select Xilinx as the Board Vendor 13 Select the Virtex II Multimedia FF896 Development Board as the Board Name 14 Select revision 1 for the Board Revision 15 Click Next on the dialog box A Base System Builder Select Processor dialog box is displayed 16 The MicroBlaze processor should be selected by default because there is not a PowerPC in this specific FPGA 17 Click Next on the dialog box A Base System Builder Configure Processor dialog box is displayed 3 University of Toronto ECE532 Digital Hardware Lab 1 Building a MicroBlaze System in XPS 18 Select XMD with S W debug stub and 64K of Local Data and Instruction Memory in the Processor Configuration This selection uses a ROM monitor debug solution not a true JTAG debug solution A ROM monitor debug solution assumes that software can execute on the platform to do debugging All of the processor memory uses the internal block RAMs of the FPGA 19 Click Next on the dialog box A Base System Builder Configure IO Interfaces dialog box is displayed The checkbox indicates that the project will be built with the RS 232 interface as specified The default settings of the Uart are OK The Uart peripheral will be used for standard I O The standard I O libraries delivered in the EDK use the Uart in polled mode so do not select the Use Interrupt checkbox 20 Click Next on the dialog box A Base System Builder Add Internal Peripherals dialog box is displayed Internal peripherals include timers interrupt controllers and other devices that are typically used within the FPGA Do not add peripherals at this time 21 Click Next on the dialog box A Base System Builder Software Configuration dialog box is displayed Un