Project Report for Embedded Systems Design 4840 MANIC Music All Night In Columbia Implementation of ADPCM decoding system using Xilinx SpartanIIE, Microblaze and other peripherals Team: Prakash G.S [email protected] Devyani Gupta [email protected] Vijayarka Nandikonda [email protected] 11th May, 2004Contents 1. Introduction 2. ADPCM Decoding 2.1 Algorithm 2.2 Implementation 2.3 Calculation of StepSize 3. Design Alternatives 4. Final Design 4.1 Platform and Peripherals 4.1.1 Universal Asynchronous Receiver Transmitter 4.1.2 UART Configuration 4.1.3 SRAM 4.1.4 Audio Codec 4.1.5 Signal Definition for Codec 4.2 Execution 4.3 Data Exchange Flow 5. Project Material 6. Conclusion & Contributions 7. References1. Introduction The original goal of our project was to design an MP3 player. However, we have revised this goal towards implement an ADPCM player owing to time constraints and numerous problems faced with respect to implementation. In addition, we also endeavor to implement a PCM player for 8 and 16 bit audio formats. What is Pulse Code Modulation? Pulse-Code Modulation A common method of representing continuous analog values in digital form is pulse-code modulation, or PCM. In PCM, distinct binary representations (pulse codes) are chosen for a finite number of points along the continuum of possible states. When-ever the value is being measured and it falls between two encoded points, the code for the closer point is used. This process is called quantization: the dividing of the range of values of a wave into sub ranges, each of which is represented by an assigned value. A series of these pulse codes can be transmitted in a pulse train, resulting in a pulse-code modulated signal. Because the samples of digitized speech referred to above are stored in the form of digital pulses, the stored waveform can be thought of as an example of pulse-code modulation. What is Adaptive Differential Pulse Code Modulation? ADPCM is an audio coding technique that is widely used throughout the telecommunications industry. It works by calculating the difference between two consecutive samples in standard pulse code modulation (PCM) and codes the error of the ‘predicted’ next sample increment (from the previous sample increment) to the true sample increment. It is a lossy compression technique that achieves a compression ratio of 4:1. However, it is popular since is returns a high quality signal with very little processing power required for fast decoding. There are primarily 2 different industry formats for ADPCM: 1. IMA/DVI ADPCM 2. Microsoft ADPCM Our implementation is centered on the IMA format.2. ADPCM Decoding 2.1 Algorithm The diagram shows the steps involved in ADPCM decoding. Step Size calculation ADPCM decoding is comprised of the following steps: Step-Size calculation: The step-size is basically a coding scale for the ADPCM. It varies dynamically to accommodate the differences between small and large samples. The step size initially starts off at a preconfigured value. This value is then readjusted/predicted for the next sample, depending on the sample received. This process is called step-size adjustment. Decoding: The decoding for each 4 bits then happens by using the current sample and the step-size. The difference of the decoded output and the previous sample is then taken. This difference yields a 16-bit linear PCM sample. 2.2 Implementation The following flow chart defines our implementation. We maintain 3 arrays to store stepsize values, nibbletobit values and sign value. We also have an array to store the value of the last 128 samples. Decoder Z-1 Z-1 + d (n) Adjusted step size L (n) X (n-1) X (n) ADPCM input sample Linear output sample Step Size16 bits 4 bits differenceNibble Select Stepsize, sGet nibbletobit value, nCompute diff value; Diff = s*n[1] + s/2*n[2] + s/4*n[3] + s/8Append Sign Value using n[0]Truncate if it exceed bounds16 bit output ADPCM decoding sequence 2.3 Calculation of Step Size For both the encoding and decoding process, the ADPCM algorithm adjusts the quantizer stepsize based on the most recent ADPCM value. The step size for the next sample, n+l, is calculated with the following equation: ss(n+1) = ss(n) * 1.1M(L(n)) This equation can be implemented efficiently as a two-stage lookup table. First the magnitude of the ADPCM code is used as an index to look up an adjustment factor as shown in Table 1. Then that adjustment factor is used to move an index pointer in Table 2. The index pointer then points to the new step size. Values greater than 3 will increase the step size. Values less than 4 decrease the step size.Table 1. `M(L(n)) Values L(n) Value M(L(n)) 1111 0111 +8 1110 0110 +6 1101 0101 +4 1100 0100 +2 1011 0011 -1 1010 0010 -1 1001 0001 -1 1000 0000 -1 Table 2. Calculated Step Sizes No. StepSize No. StepSize No. StepSize No. StepSize 1 16 13 50 25 157 37 494 2 17 14 55 26 173 38 544 3 19 15 60 27 190 39 598 4 21 16 66 28 209 40 658 5 23 17 73 29 230 41 724 6 25 18 80 30 253 42 796 7 28 19 88 31 279 43 876 8 31 20 97 32 307 44 963 9 34 21 107 33 337 45 1060 10 37 22 118 34 371 46 1166 11 41 23 130 35 408 47 1282 12 45 24 143 36 449 48 1411 49 1552 This method of adapting the scale factor with changes in the waveform is optimized for voice signals, not square waves or other non-sinusoidal waveforms. 3. Design Alternatives ADPCM implementation can be done in • Software (in a programming language) like C or • In hardware (in a hardware-description language) like VHDL. We explored both alternatives, finally settling on the software approach. This was due to the following reasons: 1. The computations involved in the decoding were not of a time-consuming nature. So implementing in hardware would have given no substantial benefit. MicroBlaze runs at a clock frequency of 50 MHz, and our input ADPCM file is of 12 kHz. So we have 50M/12k = 4000 cycles for processing each sample. This gives us ample time to implement the algorithm in software. 2. There are no floating-point computations in the procedure.MicroBlaze cannot do floating point computations. If there were floating point computations in the process, we would have had no choice but to do it in VHDL. 3. The
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