E4840 Embedded Systems Dawei Liu Project Design Xiaoliang (Lee) Zhu March 22, 2011 Funny Soundboard Goal: We plan to create an embedded system that plays back various sound clips when the user presses different buttons. The purpose is to generate laughs, and the potential application is for the system to be placed in theme parks, restaurants, or anyplace that people wait in line. Description: The system will consist mainly of an Altera DE2 board. It will have a VGA monitor output, on which a grid of buttons are displayed, along with text and animation representing the theme of the soundboard. The animation will look like a GIF image and will be restricted to an area about half the screen wide and half the screen high. This means we are not doing sprite based animation. A PS2 mouse is connected to the system and a cursor will be displayed on screen. When the user clicks on a button using the cursor, the associated sound clip is output through the Analog sound output of the DE2 board. The soundboard will have multiple themes (sets of picture/sound files) by reading from the SD card slot of the DE2 board. An example screen shot is below1: Implementation: We will use an NIOS II microprocessor implementation on the Cyclone II FPGA as the CPU. A program written in C will be responsible for processing mouse input, generating screen background, process cursor movement, generating animation, and output sound. Hardware used will be: SD card slot, PS2 interface, VGA interface, and Analog audio out Bitmap and Wave file formats will be used to save image and sound files. 1 Copyright 20th Century Fox, all rights reserved. Eat my shorts! I didn’t do it Ay Caramba! Is Seymour there? Last name Butz.Block Diagram: Software Architecture: NIOS II CPU Avalon Bus SD Card Controller S RAM Controller I2C Controller SD RAM Controller VGA Control PS/2 Controller SD Card Reader S RAM Audio Chip SD RAM VGA Monitor PS/2 Mouse Clock FAT16 Driver SD Card Controller Cursor Tracking PS/2 Controller Bitmap Decoder Background Frame Animation Frames VGA Control (Output frame buffer) Wave file buffering Audio Chip Initialization UI processingHARDWARE SD Card reader We choose to use SD card because there is an SD socket is built into the DE2 board. The SD card socket is connected physically as: With the following pin-out definitions: The single data connection of DAT0 pin means that the SD card is set up to be accessed in SPI mode from the FPGA, and data will be read serially one bit at a time. We will set up the SD Card Socket as an Avalon peripheral, and then modify the factory shipped SD Card driver to ensure performance. The interface to the SD card is simple. Commands are sent from the host through the CMD line, and the card responds with a response frame also on the CMD line, followed by data token and data bytes on DAT0 when applicable. Each command has an expected response type and error conditions. Please see references for details on SD card specification. During initial boot up, the SD card defaults to SD mode. To switch to SPI mode, we send a GO_IDLE_STATE command to the card while holding the DAT3 pin low. During this process the clock must be below 400 KHz, and we must wait at least 74 clock cycles before accessing the card. During normal operation, a read block command will be issued from the host, and the argument is the starting LBA address. The host will then have to pull the card’s status to see if card is ready to transfer data, very much like the process of accessing a hard drive.The maximum data clock for a standard SD card in SPI mode is 25 MHz, and this is the upper speed limit to access data. The SD card clock will be generated in software to easily accommodate the slow clock requirements during initialization. SRAM The 512K SRAM will be used for program, audio, and video data buffering. It will be added as an Avalon peripheral and initialized in the same way as in Lab3. The existing code and implementation should work. Please see software section for detailed allocations. SDRAM The 8MB SDRAM will be used for bit-map processing and as video memory. It will also be added as an Avalon peripheral. We will supply the controller VHDL description to satisfy the read and write timing requirements of the chip. The connection diagram is copied below. We believe the SOPC builder will handle most of the timing as part of the PC100 standard, so implementing this component should not be too difficult. PS2 Interface The PS2 interface will be used to connect a mouse. Its implementation is very similar to that of a keyboard used in Lab2. Instead of key codes sent to the host, the mouse will send three bytes to represent the movement and the buttons clicked. The typical bytes received from the mouse will be:There will be a software function to initialize the mouse. Then we will wait for the mouse input in the UI loop to update the cursor location and process button presses. VGA Controller For our project we will modify the VGA controller supplied in Lab3. We will initialize it and build its clock the same way as Lab3. We will have a “cursor” object built into the controller (think of it as a hardcoded single sprite), and it will be addressed in the same way as the bouncing ball in lab3. The address processing will be modified so we can give it 2 additional addresses. One for the static background image, which is at the resolution 640 by 480, and another for the data in the animated part of the screen. The controller will do a raster scan for the designated background part of the screen, and when it hits the animation frame (say at the middle right half of the screen), it will switch over to the other address and start reading data off of there. We can also save memory by having the static section black and white while the animation section in color. See software section for more info and discussion about bit depth. Audio output The I2C interface is used to initialize and send data to the audio decoding chip. The DE2 board shipped with an I2C interface that works to communicate to the audio chip. We will build on this component. To output audio, we set the sampling rate on the WM8731 Audio CODEC to the appropriate value for our input wave file (i.e. 44.1 kHz), and then output the wave data
View Full Document
Unlocking...