Barrel Shifter Single Cycle Datapath ECE2030 Shifter Implementation with Multiplexers 1 shifter logical shift A3 A3 A1 0 A2 d S 11 10 01 00 S0 4 1 MUX S1 d S B3 S 0 no shift A2 11 10 01 00 S0 4 1 MUX S1 B2 S 1 shift A2 A0 d S A1 11 10 01 00 S0 4 1 MUX S1 B1 d 1 shift right A1 0 d S A0 11 10 01 00 S0 4 1 MUX S1 B0 d 0 shift left Shifter Implementation with Multiplexers 1 shifter arithmetic shift A3 A3 A1 A3 A2 d S 11 10 01 00 S0 4 1 MUX S1 d S B3 S 0 no shift A2 11 10 01 00 S0 4 1 MUX S1 B2 S 1 shift A2 A0 d S A1 11 10 01 00 S0 4 1 MUX S1 B1 d 1 shift right A1 0 d S A0 11 10 01 00 S0 4 1 MUX S1 B0 d 0 shift left Shifter Implementation with Multiplexers 1 shifter rotational shift A3 A3 A1 A0 A2 d S 11 10 01 00 S0 4 1 MUX S1 d S B3 S 0 no shift A2 11 10 01 00 S0 4 1 MUX S1 B2 S 1 shift A2 A0 d S A1 11 10 01 00 S0 4 1 MUX S1 B1 d 1 shift right A1 A3 d S A0 11 10 01 00 S0 4 1 MUX S1 B0 d 0 shift left Shifter Implementation with Multiplexers 2 shifter logical shift A3 0 A0 0 A1 d S 11 10 01 00 S0 4 1 MUX S1 d S B3 S 0 no shift A2 11 10 01 00 S0 4 1 MUX S1 B2 S 1 shift A3 0 d S A1 11 10 01 00 S0 4 1 MUX S1 B1 d 1 shift right A2 0 d S A0 11 10 01 00 S0 4 1 MUX S1 B0 d 0 shift left How do you build a arbitrary shifter with a collection of one shifters Direction S0 d S n 1 Shifter n S1 Sn d S 1 Shifter n d S 1 Shifter n PROBLEM NOT VERY EFFICIENT To find a more efficient implementation consider a unsigned binary number Hk Hk 1 H2 H1 H0 2k 2k 1 4 2 1 If Hi is 1 then add 2i to the total to get a decimal number Barrel Shifter Direction H0 d S Hk Hk 1 H2 H1 H0 Shift Amount n 1 Shifter n H1 d S 2 Shifter n d S 4 Shifter n Hk d S 2k Shifter n 4 bit Barrel Shifter Let H1Ho be the shift amount Let d 1 mean shift right and d 0 mean shift left 4 d H0 d S 1 Shifter 4 H1 d S 2 Shifter 4 Example H 10 and H 11 Shifter Unit in our datapath Y X 32 st st1 st0 0 0 0 1 1 0 1 1 32 Y 0 shift right SU Y 0 shift left su en 2 32 Logical Arithmetic Rotational Y Contains the shift amount SINGLE CYCLE DATAPATH General Purpose Register Architecture Y X 5 Z 5 0 logical 1 arithmetic 2 rotational 5 addr rwe logical function Shift type st X out register file 32 x 32 Y out 32 Xk Yk Zk 0 0 1 1 lf0 lf1 lf2 lf3 0 1 0 1 32 write Z clk au en AU a s lu en rwe 4 LU lf su en register write enable SU 2 st Immediate Register im en Immediate Value Constant value that comes directly from instruction to datapath 32 bit Immediate Register 32 clk Y X 5 5 5 addr rwe Immediate Value im en Z X out register file 32 x 32 Y out 32 clk 32 bit Immediate Register 32 32 write Z clk au en AU a s lu en LU 4 lf SU su en im en low Im Register output is in the high impedance state im en high Y out is in the high impedance state 2 st Sign extension of Immediate Value im en Immediate Value will be only 16 bits 16 32 bit Immediate Register clk 32 im en 16 Sign extension 32 clk I15I14I13I12I11I10I9I8I7I6I5I4I3I2I1I0 16 Sign extension 32 I15I15I15I15I15I15I15I15I15I15I15I15I15I15I15I15I15I14I13I12I11I10I9I8I7I6I5I4I3I2I1I0 Assume negative number uses 2 s complement Single Cycle Datapath with Sign Extension Y X 5 Z 5 5 addr rwe Immediate Value 16 im en X out register file 32 x 32 Y out Sign extension 32 clk 32 32 write Z clk au en AU a s lu en LU 4 lf su en SU 2 st Timing of Single Cycle Datapath Y X 5 Z 5 5 addr rwe Immediate Value 16 im en X out register file 32 x 32 Y out clk Sign extension 32 32 32 write Z clk au en AU a s 4 LU SU 2 st su en lu en Read and or write values from to register file RF lf Read and or write values from to register file RF Compute values in AU LU or SU CLK Clock cycle time is limited by the slowest functional unit How do I control the datapath to do what I want Y X Z 5 5 5 addr rwe X out register file 32 x 32 Y out R0 R1 R2 Immediate Value 16 im en Register Transfer Level RTL clk Sign extension 32 32 32 write Z clk AU au en a s LU 1 2 0 1 0 X lf SU 2 st su en lu en X Y Z rwe imm en im va 4 au en a s 1 0 lu en 0 lf su en xxxx 0 st x How do I control the datapath to do what I want Y X 5 Z 5 5 addr X out rwe register file 32 x 32 Y out R3 R1 XOR R5 Immediate Value 16 im en clk Sign extension 32 32 32 write Z clk au en a s AU 4 LU 1 5 3 1 0 X SU 2 st su en lu en X Y Z rwe imm en im va lf au en a s 0 x lu en 1 lf su en 0110 0 st x How do I control the datapath to do what I want Y X 5 Z 5 5 addr register file 32 x 32 clk Sign extension 32 X out rwe R5 4 R6 Immediate Value 16 im en 32 32 Y out write Z clk au en AU a s 6 x 5 1 1 2 lf 2 SU st su en lu en X Y Z rwe imm en im va 4 LU au en a s 0 x lu en 0 lf su en xxxx 1 st 1 Datapath Control control word OR microinstruction step X Y Z rwe imm en im va au en a s Arithmetic unit field lu en lf Logic unit field Field Associated group of control signals su en st Shifter unit field Multiple Steps Microprograms and Microcode R3 R1 …
View Full Document