Slide 1Logic DesignCombinational LogicDesign Hierarchy ExampleDerive Truth Table for Desired FunctionalitySlide 6Combinational Logic Design ExampleMixed LogicDeMorgan’s LawMixed Logic (1)Example: Mixed Logic (1)Mixed Logic (2)Example: Mixed Logic (2)Mixed Logic (3)Example: Mixed Logic (3)Mixed Logic (4)Example: Mixed Logic (4)How about Inverters?Example: Mixed Logic (Final)Slide 20Slide 21Slide 22Slide 23Slide 24Slide 25Slide 26Slide 27Mixed Logic Example II (1)Mixed Logic Example II (2)Mixed Logic Example II (3)Mixed Logic Example II (4)Mixed Logic Example II (5)Mixed Logic Example II (6)Mixed Logic Example II (7)Mixed Logic Example III (1)Mixed Logic Example III (2)Mixed Logic Example III (3)Mixed Logic Example III (4)Mixed Logic Example III (5)Mixed Logic Example III (6)Mixed Logic Example III (7)ECE2030 Introduction to Computer EngineeringLecture 9: Combinational Logic, Mixed LogicProf. Hsien-Hsin Sean LeeProf. Hsien-Hsin Sean LeeSchool of Electrical and Computer EngineeringSchool of Electrical and Computer EngineeringGeorgia TechGeorgia Tech2Logic Design•Logic circuits–Combinational–SequentialCombinationalcircuitsNinputsMoutputsCombinationalcircuitsinputsoutputsStorageElementdelaydelay3Combinational Logic•Outputs, “at any time”, are determined by the input combination •When input changed, output changed immediately–Note that real circuits are imperfect and have “propagation delay”•A combinational circuit –Performs logic operations that can be specified by a set of Boolean expressions–Can be built hierarchicallyCombinationalcircuitsNinputsMoutputs4Design Hierarchy Example9-inputOdd FunctionX0X1X2X3X4X5X6X7X8ZA0A1A23-inputOdd FunctionZA0A1A23-inputOdd FunctionX3X4X5A0A1A23-inputOdd FunctionX6X7X8B0B0A0A1A23-inputOdd FunctionX0X1X2B09-input Odd FunctionHow to design a 3-input Odd Function?Function Specification:To detect odd numberof “1” inputs, i.e. Z=1 when there is an odd number of “1” present in the inputs5Derive Truth Table for Desired FunctionalityA B C F0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 11 0 1 01 1 0 01 1 1 100 01 11 1000 1 0 111 0 1 0 ABCCBAC)(BA)CBA(C)(BABC)CBA()CBCB(AABCCBACBACBAF6Design Hierarchy Example9-inputOdd FunctionX0X1X2X3X4X5X6X7X8ZA0A1A23-inputOdd FunctionZA0A1A23-inputOdd FunctionX3X4X5A0A1A23-inputOdd FunctionX6X7X8B0B0A0A1A23-inputOdd FunctionX0X1X2B09-input Odd Function3-input Odd function:B0=A0A1A2A0A1A2B07Combinational Logic Design ExampleDA BC D)C,B,F(A, BCDAF8Mixed Logic•Enable component reuse•Allow a digital logic circuit designer to implement a combinational logic with–Only NAND gates–Only NOR gates–Only NAND and NOR gates9DeMorgan’s Law10Mixed Logic (1)•Implement all ORs in the Boolean function•Implement all ANDs in the Boolean function•Forget all the inversion at this moment11Example: Mixed Logic (1)DA BC D)C,B,F(A, BCDA12Mixed Logic (2)•Draw “Vertical Bars” in the circuits where all complements in the Boolean equation occur•Draw a bubble on each Vertical Bar13Example: Mixed Logic (2)DA BC D)C,B,F(A, BCDA14Mixed Logic (3)•Convert each gate to the desired gate –If only NAND gate is available, insert a bubble in front of the AND gate–If only OR gate is available, insert a bubble in front of the OR gate•Using DeMorgan’s Law in the process–OR NAND: by adding 2 bubbles on the inputs side of OR–AND NOR: by adding 2 bubbles on the inputs side of the AND15Example: Mixed Logic (3)DA BC D)C,B,F(A, BCDAAssume this design uses Assume this design uses NANDNAND gatesgates only only ==16Mixed Logic (4)•Balance the bubbles on each wire, i.e. even out the number of bubbles on every wire•If there is odd number of bubbles on a wire, add an inverter (i.e. a bubble) •And remove those “vertical bars with bubbles” which are used to help only, not in the circuits17Example: Mixed Logic (4)DA BC D)C,B,F(A, BCDAAssume this design uses Assume this design uses NANDNAND gatesgates only only18How about Inverters?•Inverters can be implemented by either a NAND or a NOR gate–Wiring the inputs together19Example: Mixed Logic (Final)DA BC D)C,B,F(A, BCDAAssume this design uses Assume this design uses NANDNAND gatesgates only only20Example: Mixed Logic (Final)DA BC D)C,B,F(A, BCDAAssume this design uses Assume this design uses NANDNAND gatesgates only only 6 NAND gates are used6 NAND gates are used21Mixed Logic•How about build the prior circuits with only NOR gates?22Example: Mixed Logic (1)DA BC D)C,B,F(A, BCDA23Example: Mixed Logic (2)DA BC D)C,B,F(A, BCDAAdd vertical bar forAdd vertical bar foreach inversioneach inversion24Example: Mixed Logic (3)DA BC D)C,B,F(A, BCDAAssume this design uses Assume this design uses NOR gatesNOR gates only only ==Convert each gate Convert each gate to a NORto a NOR25Example: Mixed Logic (4)DA BC D)C,B,F(A, BCDAAssume this design uses Assume this design uses NOR gatesNOR gates only only Balance number ofBalance number ofBubbles on each wire Bubbles on each wire26Example: Mixed Logic (4)DA BC D)C,B,F(A, Assume this design uses Assume this design uses NOR gatesNOR gates only only Balance number ofBalance number ofbubbles on each wire bubbles on each wire and substitute all gates and substitute all gates to NOR to NOR BCDA27Example: Mixed Logic (Final)DA BC D)C,B,F(A, Assume this design uses Assume this design uses NOR gatesNOR gates only only BCDA7 NOR gates are used7 NOR gates are used28Mixed Logic Example II (1)))DC (B AC BAF CDABImplement the logic circuits by ignoring all inversionsImplement the logic circuits by ignoring all inversions29Mixed Logic Example II (2)))DC (B AC BAF CDABAdd vertical bar/bubble for each inversionAdd vertical bar/bubble for each inversion30Mixed Logic Example II (3)))DC (B AC BAF CDABAssume this design uses Assume this design uses NANDNAND gatesgates only only31Mixed Logic Example II (4)))DC (B AC BAF CDABBalance the bubbles for each wire w/ invertersBalance the bubbles for each wire w/ inverters32Mixed Logic Example II (5)))DC (B AC BAF CDABRemove the vertical bars/bubblesRemove the vertical bars/bubbles33Mixed Logic Example II (6)))DC (B AC BAF CDABReplace all the gates to Replace all the gates to NAND gatesNAND gates34Mixed Logic
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