1Supplement toLogic and ComputerDesign Fundamentals3rd Edition1CMOS CIRCUITSSo far we have dealt largely with implementing logic circuits in terms of gates. Inthis supplement, we briefly explore implementing the gates themselves usingCMOS technology. In addition, we study how structures other than primitive logicgates can be implemented directly in terms of electronic elements called transis-tors. CMOS implementation is important because we often design CMOS logicfrom Boolean equations directly to the transistor level, skipping the logic gatelevel.Switch Models for CMOS TransistorsCMOS technology employs two types of transistor: n-channel and p-channel. Thetwo differ in the characteristics of the semiconductor materials used in their imple-mentation and in the mechanism governing the conduction of a current throughthem. Most important to us, however, is the difference in behavior of the two typesof transistor. We will model this behavior using switches controlled by voltages cor-responding to logic 0 and logic 1. Such a model ignores complex electronic devicesand captures only logical behavior. The symbol for an n-channel transistor is shown in Figure 1(a). The transistorhas three terminals: the gate (G), the source (S), and the drain (D), as shown inFigure 1(b). The voltage applied between G and S determines whether a path forcurrent to flow exists between D and S. If a path exists, we say that the transistor is1© Pearson Education 2004. All rights reserved. elected topics not covered in the third edition of Logic and Computer Design Fundamentals are provided here for optional coverage and for self-study if desired. This material fits well with the desired coverage in some programs but not may not fit within others due to time constraints or local preferences. This supplement, referenced in Chapter 2 as a part of the coverage Other Gate Types, presents a functional view of the implementation of gates as CMOS electronic circuits. It is particularly appropriate for coverage by electrical or computer engineering students. S2ON, and if a path does not exist, we say that the transistor is OFF. The n-channeltransistor is ON if the applied gate-to-source voltage is H and OFF if the appliedvoltage is L. Here we will make the usual assumption that a 1 represents the Hvoltage range and a 0 represents the L voltage range. The notion of whether a path for current to flow exists is easily modeled by aswitch, as shown in Figure 1(c). The switch consists of two fixed terminals corre-sponding to the S and D terminals of the transistor. In addition, there is a movablecontact that, depending on its position, determines whether the switch is open orclosed. The position of the contact is controlled by the voltage applied to the gateterminal G. Since we are looking at logic behavior, this control voltage is repre-sented on the symbol by the input variable X on the gate terminal. For an n-chan-nel transistor, the contact is open (no path exists) for the input variable X equal to0 and closed (a path exists) for the input variable X equal to 1. Such a contact istraditionally referred to as being normally open, that is, open without a positivevoltage applied to activate or close it. Figure 1(d) shows a shorthand notation forthe n-channel switch model with the variable X applied. This notation representsthe fact that a path between S and D exists for X equal to 1 and does not exist forX equal to 0.The symbol for a p-channel transistor is shown in Figure 2(a). In Figure 2(b),the positions of the source S and drain D are seen to be interchanged relative totheir positions in the n-channel transistor. The voltage applied between the gate Gand the source S determines whether a path exists between the drain and source.Note in Figure 2(a) that the negation indicator or bubble appears as a part of thesymbol. This is because, in contrast to the behavior of an n-channel transistor, apath exists between S and D in the p-channel transistor for input variable X equalto 0 (at value L) and does not exist for input variable X equal to 1 (at value H).This behavior is represented by the model in Figure 2(c), which has a normallyFIGURE 1Symbol and Switch Model for n-Channel TransistorX(a)X(b)GDSX: X(d)X:(c)••FIGURE 2Symbol and Switch Model for p-Channel TransistorX:(c)••X: X(d)X(a)•X(b)GDS•3closed contact through which a path exists for X equal to 0. No path exists throughthe contact for X equal to 1. In addition, the shorthand notation of the p-channelswitch model with variable X applied is given in Figure 2(d). Since a 0 on input Xcauses a path to exist through the switch and a 1 on X produces no path, the literalshown on the switch is instead of X.Networks of SwitchesA network made up of switches that model transistors can be used to designCMOS logic. The network implements a function F if there is a path through thenetwork for F equal to 1 and no path through the network for F equal to 0. A sim-ple network of p-channel transistor switch models is shown in Figure 3(a). Thefunction G1 implemented by this network can be determined by finding the inputcombinations for which a path exists through the network. In order for the path toexist through G1, both switches must be closed; that is, the path exists for and both 1. This implies that X ⫽ 0 and Y ⫽ 0. Thus, the function G1 of the network is, in other words, the NOR function. In Figure 3(b), for function G2,a path exists through the n-channel switch model network if either switch is closed,that is, for X ⫽ 1 or Y ⫽ 1. Thus, the function G2 is X ⫹ Y. In general, switches in series give an AND function and switches in parallelgive an OR function. (The function for the preceding network that models p-chan-nel transistors is a NOR function because of the complementation of the variablesand the application of DeMorgan’s law.) By using these network functions to pro-duce paths in a circuit that attach logic 1 (H) or logic 0 (L) to an output, we canimplement a logic function on the output, as discussed next. Fully Complementary CMOS CircuitsThe subfamily of CMOS circuits that we will now consider has the general struc-ture shown in Figure 4(a). Except during transitions, there is a path to the outputof the circuit F either from the power supply ⫹V (logic 1) or from ground (logic 0).Such a circuit is called static CMOS. In order to have a static circuit, the transistorsmust implement networks of switches for both function F and function . In