R.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-1ISA•CHAPTER XIIICHAPTER XIIIINSTRUCTION SET ARCHITECTURE (ISA)READ INSTRUCTIONS FREE-DOC ON COURSE WEBPAGER.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-2ISAINTRODUCTIONISA•ISA-INTRODUCTION•We have now considered the beginnings of the internal architecture of a computer.• With this, we considered microcode operations for performing simple data routing and calculations in one clock cycle.•As a programmer, we don’t want to interface with the microprocessor and manually send each and every control signal as is done with microcode.• We would prefer to abstract the instruction sent to the microprocessor. • Let the microprocessor designer handle the decoding of the abstracted instruction into the microcode control operations.•Start to define an assembly langauge! MIPS R3000/4000!R.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-3PROGRAM PATHTRANSLATING CODEISA•ISA-INTRODUCTION•Below is the process for translating a program to machine opcodes.High level programe.g. C, C++,add $10, $8, $9xor $13, $11, $12lw $15,0($16)010110001010111010010011001010100110101110110100101110100101010111011Assembly languageprogramMachine instructionsPascal, JavaCompiler translatesprogramAssembler convertsto machine codeR.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-4PROGRAM PATHEXECUTING CODEISA•ISA•PROGRAM PATH-TRANSLATING CODE•Once the opcodes are given to the microprocessor, it translates the opcode instructions to the microcodes operations we discussed.010110001010111010010011001010100110101110110100101110100101010111011MachineMicroprocessorMachine opcodessent tomicroprocessorDPUInstruction decodertranslates opcodesto the microcodesInstruction DecoderInstructionsR.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-5MIPS ASSEMBLYMIPS REGISTER NAMESISA•ISA•PROGRAM PATH-TRANSLATING CODE-EXECUTING CODE•For MIPS assembly, many registers have alternate names or specific uses.Register Name(s) Use0 $zero always zero (0x00000000)1 reserved for assembler2-3 $v0-$v1 results and expression evaluation4-7 $a0-$a3 arguments8-15 $t0-$t7 temporary values16-23 $s0-$s7 saved values24-25 $t8-$t9 temporary values26-27 reserved for operating system28 $gp global pointer29 $sp stack pointer30 $fp frame pointer31 $ra return addressR.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-6MIPS ASSEMBLYBASIC INST. FORMATISA•ISA•PROGRAM PATH•MIPS ASSEMBLY-MIPS REGISTER NAMES•Need to consider an assembly language example. We will use the MIPS R3000/4000 assembly so that you can refer to the Instruction free-doc.•MIPS R3000/4000 assembly instruction format:• The majority of MIPS instructions have the following assembly language instruction format.• <inst mnemonic> <destination>, <source 1>, <source 2>• You can see that this instruction format fits the register transfer level notation discussed with the single cycle DPUR18 R12 R15+=source 1 source 2destinationR.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-7MIPS ASSEMBLYREGISTER FORMAT INST.ISA•PROGRAM PATH•MIPS ASSEMBLY-MIPS REGISTER NAMES-BASIC INST. FORMAT•Register format (R-format) instructions• Many MIPS instructions have the following format for register to register type binary operations.• <instr> $<write register>, $<read register 1>, $<read register 2>• An example of this is• add $10, $8, $9• This is the same as with our register transfer level operation• R10 = R8 + R9R.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-8MIPS ASSEMBLYREGISTER INSTRUCTIONSISA•MIPS ASSEMBLY-MIPS REGISTER NAMES-BASIC INST. FORMAT-REGISTER INST. FORMAT•Below is the basic list of register format MIPS instructions.Instruction Interpretationadd $10, $8, $9 R10 = R8 + R9sub $10, $8, $9 R10 = R8 - R9and $10, $8, $9 R10 = R8 and R9or $10, $8, $9 R10 = R8 or R9xor $10, $8, $9 R10 = R8 xor R9sa $10, $8, $9 (shift arithmetic) Shift R8 by R9 and store in R10sl $10, $8, $9 (shift logical) Shift R8 by R9 and store in R10rot $10, $8, $9 (rotate) Rotate R8 by R9 and store in R10lw $10, 0($8) R10 = M[0+R8]sw $10, 0($8) M[0+R8] = R10R.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-9MIPS ASSEMBLYIMMEDIATE INST. FORMATISA•MIPS ASSEMBLY-BASIC INST. FORMAT-REGISTER INST. FORMAT-REGISTER INSTRUCTIONS•Immediate format (I-format) instructions• Many MIPS instructions have the following format for register to register type binary operations.• <instr> $<write register>, $<read register>, <immediate value>• An example of this is• addi $10, $8, 4• This is the same as with our register transfer level operation• R10 = R8 + 4Note: No $ for last argumentNote: Include “i” to indicate an immediate value is used.Again, no $ for immediate valueR.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-10MIPS ASSEMBLYIMMEDIATE INSTRUCTIONSISA•MIPS ASSEMBLY-REGISTER INST. FORMAT-REGISTER INSTRUCTIONS-IMMEDIATE INST. FORMAT•Below is the basic list of immediate format MIPS instructions.Instruction Interpretationaddi $10, $8, 4 R10 = R8 + 4subi $10, $8, 4 R10 = R8 - 4andi $10, $8, 4 R10 = R8 and 4ori $10, $8, 4 R10 = R8 or 4xori $10, $8, 4 R10 = R8 xor 4sai $10, $8, 4 (shift arithmetic) Shift R8 by 4 and store in R10sli $10, $8, 4 (shift logical) Shift R8 by 4 and store in R10roti $10, $8, 4 (rotate) Rotate R8 by 4 and store in R10lw $10, 4($0) R10 = M[4+R0]sw $10, 4($0) M[4+R0] = R10R.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-11INST. SET ARCH.INSTRUCTION FORMATSISA•MIPS ASSEMBLY-REGISTER INSTRUCTIONS-IMMEDIATE INST. FORMAT-IMMEDIATE INSTRUCTIONS•How should the assembly be translated to machine code?• Have to consider what control signals the DPU requires!• How do we abstract from the DPU’s requirements?????????????????????MachineMicroprocessorInstructionssent tomicroprocessorDPUInstruction DecoderInstructionsR.M. Dansereau; v.1.0INTRO. TO COMP. ENG.CHAPTER XIII-12INST. SET ARCH.OPCODESISA•MIPS ASSEMBLY•INSTRUCTION SET ARCH.-INSTRUCTION FORMATS•First important part of a machine instruction is known as the operational codes (opcodes).• An opcode indicates what major operation to perform.• Example major operations: add, subtract, AND, OR, NOT, XOR, shift• Once all major operations are identified for a processor design,assign binary codes to each of the operation.• For example, say that we want to design a machine that can perform 40 different types of major operations.• Then we would require at least 6 bits to represent
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