ECE 2030d Quiz #4 Spring 2011 Name: Student #: * Closed Book * No Notes * No Calculators * 1. (2 points) Complete the truth table to describe the behavior of this circuit. 2. (5 points) A transparent latch is constructed, as shown at the right, using this circuit. Complete the timing diagram for the behavior of this latch. Assume the output of the latch is initially zero. 3. (3 points) Two of these transparent latches are used to implement a register (flip-flop), using two-phase non-overlapping clocks, as shown at the right. Answer each question below about this flip-flop by circling the best answer. a) Is this register transparent? YES NO b) When can the output, Z, change value? Rising edge of phi2 Falling edge of phi2 multiple times while phi2 is active c) The new state of the flip-flop is determined by the value of the input, X, at what time? Rising edge of phi1 Falling edge of phi1 Rising edge of phi2 Falling edge of phi2 A B out 0 0 0 1 1 0 1 1 ENABLE IN OUT IN OUT ENABLE IN OUT ENABLE X Z phi1 phi2 A B out IN OUT ENABLEECE 2030d Quiz #4 Spring 2011 Name: SOLUTION Student #: * Closed Book * No Notes * No Calculators * 1. (2 points) Complete the truth table to describe the behavior of this circuit. 2. (5 points) A transparent latch is constructed, as shown at the right, using this circuit. Complete the timing diagram for the behavior of this latch. Assume the output of the latch is initially zero. (when ENABLE =1, OUT = IN; when ENABLE = 0; OUT holds its value) 3. (3 points) Two of these transparent latches are used to implement a register (flip-flop), using two-phase non-overlapping clocks, as shown at the right. Answer each question below about this flip-flop by circling the best answer. a) Is this register transparent? YES NO b) When can the output, Z, change value? Rising edge of phi2 Falling edge of phi2 multiple times while phi2 is active c) The new state of the flip-flop is determined by the value of the input, X, at what time? Rising edge of phi1 Falling edge of phi1 Rising edge of phi2 Falling edge of phi2 A B out 0 0 1 0 1 1 1 0 0 1 1 out* * or hold, no change, etc. IN OUT ENABLE IN OUT ENABLE X Z phi1 phi2 A B out IN OUT ENABLE ENABLE IN
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