Mixed LogicIntroductionMixed logic is a gate-level design methodology used in industry. It allows a digital logic circuit designerthe functional description of the circuit from its physical implementation. For example, consider thefunction:F = A · BThis is a functional description. Two possible physical implementations are listed below, one using aNAND gate and inverters, the other using a NOR gate and inverters:ABFNANDABFNORBoth of the above circuits implement the same function, but are different physical implementations.Which is easier to read? Ideally, the implementation of the circuit should not affect your ability to figureout what the circuit does. The goal of mixed logic design is to:1. Separate what the circuit does from how it does it ; and2. support self-documenting circuits.AnalysisBefore getting into the details of how to design a mixed-logic circuit, let us modify the circuit of thepreceeding example to see how mixed-logic notation works. Using mixed-logic notation, the above cir-cuits are now illustrated as:ABFNANDABFNORNote the vertical bars with the bubbles in both circuits. They do not represent physical circuit elements– they are simply a form of notation. To read a circuit using mixed logic notation:1. Ignore all bubbles on logic gates and inverters. This means(a) Read all NANDs and ANDs as ANDs ;(b) read all NORs and ORs as ORs ; and(c) ignore all inverters.2. Wherever you see a vertical bar with a bubble, take the complement.1Thus when reading the circuit left to right, a bar should exist everywhere that a complement exists inthe corresponding logic equation. By not worry about everywhere a physical inversion takes place, it ismuch easier to read the function implemented by the circuit.In both examples above, A is complemented yielding A. Ignoring all inverters and treating both logicgates as an AND, the output of the gate is AB. Inverting the output by the vertical bar after the logicgates results in AB.DesignMixed logic design is based on the key observation of DeMorgan’s theorem: logical operations haveequivalencies when their inputs and outputs are inverted. DeMorgan’s square, shown below, illustratesthe equivalencies of the four basic gate types.A B0 0011 0110001ANDA B0 0011 011NAND1110A B0 0011 01100A B0 0011 01111NOR OR1001invert outputinvert inputInverting the output of the gate moves horizontally in the square. Moving vertically is accomplished byinverting all gate inputs (turning the truth table upside down).Each of the four fundamental gates types has both an AND-based and OR-based functional equivalency,based on DeMorgan’s theorem. You have already seen this for NAND and NOR gates, but it applies toAND and OR gates as well. While it may seem counterintuitive to draw an AND gate as an OR bodywith inverted inputs and outputs, this variation makes mixed logic design possible.2Design Example 1Design a logic circuit for the functionF = A + (B · C)If implemented in a straightforward manner using traditional gate symbols, its implementation would be:ABCFWhat if we wanted to implement it using just NAND gates? Or only NAND and NOR gates? Or anyother constraint on what logic gates are used for the physical implementation? The basic design rulesfor implementing a mixed logic design are:1. All logic operations in the function (sum and product) become gate bodies in the circuit.(a) implement all OR operations in the logical function using the OR equivalency of the logicgate ; and(b) implement all AND operations in the logical function using the AND equivalency of thelogic gate.Note that you can use any of the basic logic gates (NAND/NOR/AND/OR), depending on yourdesign constraints.2. Draw vertical bars in the circuit where all complements in the logical function occur. Draw abubble on each bar.3. All bubbles in the circuit should be paired so that they cancel out. A bubble may be paired with:(a) another bubble on a logic gate ; or(b) a bubble on a vertical bar.The vertical bars with bubble do not represent physical devices (like inverters), they are just aform of notation to represent a complement in the underlying function. Anywhere a pairing of abubble is not possible, place an inverter.Now your circuit implementation is complete.To illustrate mixed logic design, we will implement the function above four different ways: using NANDgates and inverters, NOR gates and inverters, AND gates and inverters, and OR gates and inverters.First, draw the circuit graphically (this is not a physical implementation), using AND/OR gates for theoperations and the vertical bars for the complement. As a reminder, F = A + (B · C).ABCF3Now let’s design it using just NAND gates and inverters.1. Implement the AND and OR operations of the circuit using the corresponding equivalencies ofthe NAND gate.ABCF2. Draw vertical bars (with bubble) in the circuit where all complements of the logic function occur.Draw a bubble on each bar.ABCF3. All bubbles in the circuit should be paired so that they cancel out. A bubble may be paired with:(a) another bubble on a logic gate ; or(b) a bubble on a vertical bar.ABCFYou’re done! You’ve now implemented the circuit using 2 NAND gates and 3 inverters, which requires14 transistors (4 each for the NAND gates, 2 each for the inverters). The circuit is also self-documenting,in that by ignoring the inverters and bubbles on the gates and just paying attention to the vertical bars,you can easily read off the function being implemented.The figure below shows 4 different circuit implementations of this function, each using a different typeof gate (NAND, NOR, AND, OR). All circuits implement the same function. The first is the examplethat you just saw. Also shown with each circuit is the transistor count for that particular implementation.4ABCFABCFABCFABCFNAND (14)NOR (14)AND (18)OR (14)Note that three of the four circuits have similar transistor counts, while the AND-based implementationrequires more. Why would you choose a particular implementation? There are three general reasons.1. To reduct transistor count.2. Component reuse. Prior to the development of programmable logic, digital circuit boards wereimplemented entirely with chips (integrated circuits, or ICs) that would have a fixed number ofgates on them. For example, an IC called a 7400 is a “quad 2-input NAND gate.” It has 4 NANDgates on it that can be wired up to other ICs. If the designer had one spare NAND gate unallocatedon an IC, she may choose to fit it into a circuit