Instruction Fetch and BranchingWeb Reading: BranchingProgram Counter (32 bit register)Instruction MemoryaddressdataInstruction Register (32 bit register)32324323232+Instruction Fetch ( with no branching to start!)Conditional Branching Formatsbeq $RZ,$RX, branch targetbne $RZ,$RX, branch targetopcode ZX 16 bit "branch offset"I-Format InstructionIF branch taken then Program Counter(PC) becomes:PC = PC +4+ 4*offsetELSERemember the offset is a signed number using 2's complement!PC = PC + 4"PC-relative addressing"Conditional Branching Formatsj jump_addressjump statement unconditional "jumps" to another portion of the programopcode 26 bit Jump Address (JA)J-format Instruction (32 bits)* Address is word address (but we have a byte addressed memory)Multiple JA by 4 to convert to a byte addressed memory!!* Only have a 28 bit byte address and we need 32!Concatenate the upper four bits of the PC to 4*JA!"Pseudodirect Addressing"Pseudodirect addressing has a limitation!Must exist within 228 (256Mbyte) Address space!jr $RX$RX is the put into the 32-bit PC which can jump to any location!IF-THEN STATEMENT$R3= 32;$R2 = 2;IF ($R1 = = $R2){$R4 = $R3+$R2;}ELSE{$R4 = $R3 - $R2;}$R4 = 8*$R4sub $R0, $R0,$R0addi $R3,$R0,32addi $R2,$R0,2bne $R1,$R2, ELSEadd $R4,$R3,$R2j END_ELSEsub $R4,$R3,$R2sai $R4,$R4,-3END_ELSE:ELSE:High-Level IF-THEN StatementAssembly IF-THEN StatementWHILE-LOOP STATEMENT$R2= 32;$R3= 0;$R4 = 0;while ($R2 ! = $R3){ $R4 = $R4 + $R3; $R3 = $R3 +1}$R5 = $R4 AND $R3sub $R0, $R0,$R0addi $R2,$R0,32sub $R3,$R3,$R3sub $R4,$R4,$R4beq $R2,$R3, END_LOOPadd $R4,$R4,$R3addi $R3,$R3,1j LOOPHigh-Level WHILE LOOPAssembly IF-THEN StatementEND_LOOP: and $R5,$R4,$R3LOOP:Add beq and j instructions to our datapath!Add two control lines to the datapath!beqjmp sel= 1 if branching instruction is to be executed= 0 otherwise= 1 if jump instruction is to be executed= 0 otherwiseZero= 1 if result of AU is zero= 0 otherwiseAdd one output (Zero) to the Arithmetic Unit (AU)rweZ bus325X5Z01beqY5ZZXYaddressesAUZeroX outY outRFau ena/sopcode ZX 16 bit "branch offset"I-Format InstructionAdding beq and j instructions to our datapath!Program Counter (32 bit register)Instruction MemoryaddressdataInstruction Register (32 bit register)323201beqZerols 2Branch Offset401ls 2263232jmp seljump_address2832+Native InstructionsThese instructions can be directly implemented in our GT datapath!add $R1,$R2,$R3sub $R1,$R2,$R3and $R1,$R2,$R3or $R1,$R2,$R3xor $R1,$R2,$R3sa $R1,$R2,$R3sl $R1,$R2,$R3rot $R1,$R2,$R3addi $R1,$R2, 100subi $R1,$R2, 100andi $R1,$R2, 100ori $R1,$R2, 100xori $R1,$R2,100sai $R1,$R2,100sli $R1,$R2, 100roti $R1,$R2, 100lw $R1, $R2sw $R1, $R2R-formatI-formatJ-formatj Jump_Targetbeq $R1,$R2, branch_targetPseudoinstructionsThese are extra instructions that are provided by the assembler!*register indirect addressing is native to our datapath*index addressing??lw $R10, 100 ($R2)sw $R10, 100 ($R2)$R10 = M[$R2 + 100]M[$R2 + 100] = $R10Index Addresslw $R10, 100 ($R2)sw $R10, 100 ($R2)addi $R2,$R2,100lw $R10, $R2subi $R2,$R2, 100addi $R2,$R2,100sw $R10, $R2subi $R2, $R2, 100Other pseudoinstructions for GT Datapath ...bne $ROP1, $ROP2, Branch targetli $RDEST, immediate valuela $RDEST, addressmove $RDEST, $ROP1already definedMove the immediate imm value into $RDESTLoad computed address into $RDESTmove register $ROP1 into $RDESTUsed for procedure callsTBD2-7RESERVED FOR ASSEMBLER$at1TBD28-31RESERVED for OS kernal$k0-$k126-27Temporary (not preserved acrossprocedure calls)$t8-$t924-25Saved temporary (preservedacross procedure calls)$s0 - $s716-23temporary (not preserved acrossprocedure calls)$t0 - $t78 -15Always a constant zero$zero0USAGENEW REGISTERNAMEREGISTERNUMBERProgramming convention for GT Datapath Assembly
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