EE 140 ANALOG INTEGRATED CIRCUITS SPRING 2009 C. Nguyen CTN 3/19/09 1 CMOS Operational Amplifier Design Problem Issued: Tuesday, March 31, 2009 Due: Friday, May 1, 2009, (Absolutely No Extensions.) CMOS operational amplifiers have become an integral part of many integrated circuit chips fa-bricated today in a number of application areas. These amplifiers offer a number of advantages in terms of power dissipation, die area, and compatibility with digital circuits when compared with their bipolar counterparts. Therefore, it is important that anyone taking EE 140 have an in-depth understanding of the tradeoffs and issues involved in the design of these op amps. This understanding is best acquired by ac-tually designing an op amp from beginning to end. Thus, in this lab you are asked to design and simulate a CMOS operational amplifier that can satisfy the set of specifications given. You do not need to create a layout for the amplifier. However, you may have to perform some analysis in order to estimate the source/drain areas and perimeters of the transistors to calculate junction capacitances. Make sure that you follow the guidelines listed below: 1- You are to work on this design project individually. Although you can discuss generalities with oth-er students in the class, you are not to perform the design in teams or groups. The chances of any two people coming up with the same exact design are very slim. Therefore, we expect to see differ-ent designs from each one of you. 2- You are not required to do a layout for this amplifier. However, you do need to make sure that you take into account all the important layout effects and parameters. In particular, all the parasitic capa-citances from pn junctions should be included. This means that you need to specify the areas and re-levant perimeters of the drain and source for each transistor. You should estimate these areas based on λ design rules (where the lengths of the drains and sources are 5λ) and on the designed dimen-sions of the individual transistors. (Note that this λ is not the same as the LAMBDA parameter in SPICE model definitions; it’s just an unfortunate coincidence that they have the same name. Also note that λ design rules were covered in the first few lectures of this course.) 3- You are not necessarily supposed to use any design tool other than SPICE. You can use any version of SPICE you like, so long as we have access to your SPICE code. Be aware, however, that HSPICE is preferred. 4- Assume that λ = 65 nm for the technology to be used for this design. This means that every dimen-sion used must be a multiple of 65 nm, and that the minimum feature size in this technology is 2λ = 130 nm. In other words, the minimum drawn gate length is 130 nm. In addition, the lengths of the transistor drains and sources are 5λ = 325 nm. Use this information to determine drain and source areas and perimeters for your calculations. Note that you do not need to perform a detailed layout; a realistic estimation of areas and relevant perimeters is sufficient. It is suggested that you use a min-imum width of 3λ = 195 nm for the transistors in your circuit. This will minimize circuit perfor-mance variations due to integrated circuit fabrication process variations. 5- Your design approach should be outlined in your final report on this project. It is suggested that you use the following approach: a- Start with a circuit topology and perform hand calculations to come up with the estimates of the various parameters; b- Confirm the operation of the circuit using SPICE; c- Include all parasitics and important layout characteristics and redo simulations; d- Iterate design and re-simulate until all specs are met;EE 140 ANALOG INTEGRATED CIRCUITS SPRING 2009 C. Nguyen CTN 3/19/09 2 e- Write your report. 6- Your final report should be brief, concise, and complete. The report should be typewritten, and should be divided into the following sections (with page limits strictly observed using 12pt font sizes and reasonably-sized figures): Overview (1-2 pages): Complete schematic and basic description of circuit operation (including biasing). Your schemat-ic should include device sizes next to each transistor. This section should not contain design dis-cussion. Design (1-3 pages): A brief discussion of your design approach, specifically identifying important constraints. Note that you may have to provide some basic and important equations that you have used in your design. Transistor and Bias Summary (1 page): A table listing for each transistor, the dimensions, drain bias current, the magnitude of the gate-to-source voltage, the transconductance, and the output conductance; Performance (1 page): A table comparing the simulated performance with the design objectives. This table should be as complete as possible and should include all the information about the op-amp performance spe-cifications. Discussion (<10 pages, plus figures): A discussion of circuit performance with special attention paid to unique areas in your design which helped/hurt your attempts to meet the specifications. This is the most important section, in that it provides the validation for your design. Each of the performance specifications listed below should be validated in a subsection. You may want to include a diagram of the circuit you used, the justification for its use, and the simulation results or output data showing that it has met the needed specifications. Note that you should show simulation results for all the specifica-tions. For each, select an appropriate circuit topology (i.e., input sources, current measuring sources, etc.) for measurement. Conclusion (1 page): A summary of your design experience. You should summarize the overall op amp characteris-tics, and should describe your overall experience and what you learned in doing this design. It would be good to get some feedback from you, both good and bad. Tell me if the design prob-lem was worth the effort. (Your comments here will not adversely affect your grade) You should try your best to achieve the following design specifications. If after all attempts you failed to meet all the design specifications, describe your optimum and final design and describe in your report what you consider to have been the most restrictive and problematic spec to meet. Also discuss how that particular spec could be improved, i.e. discuss
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