EECS140 Fall 2009 HW3 Due 9/17/09 1) A. You have a single stage MOS amplifier with a low frequency gain of 100, a pole frequency of 5MHz, and an output capacitance of 1pF. Calculate the unity gain frequency, the transconductance gm, and the output resistance Ro. B. You need to design a single-stage amplifier with a gain of 5 at 109 rad/sec, and a DC gain of 50. Calculate the unity gain frequency, the pole frequency, and the gain at 107 rad/sec and 1010 rad/sec. C. You have a single-stage amplifier with an output resistance of 107 Ohms, a transconductance of 10mS, and a unity gain frequency of 109 rad/sec. What is the DC gain, the pole frequency, and the output capacitance? 2) Fill in the following table for a single-pole amplifier gm [S] Ro [Ω] CL [F] Av ωp [rad/s] ωu [rad/s] a) 1m 50k 2p b) 5p 100 10M c) 5p 100 5G d) 15k 5M 150M e) 100 5 20G 3) Assuming a common-source amplifier with a PMOS load, for each of the rows above design the amplifier with a bias current and Vdsat that gives you the gm required, while keeping the parallel output resistance of the two FETs greater than Ro, and the total output capacitance less than CL.4) For the common source amplifier below, consider channel length modulation in all calculations. A) Calculate Vdsatn and Idn at Vout= Vdsatn for the NMOS transistor assuming VBN = 0.8 V. B) Plot Idn vs. Vout. What is the minimum and maximum value for Idn which the NMOS device is in saturation in this circuit? C) What is the value of Vi for which the NMOS device is just on the edge between the saturation and linear regions? (you calculated the current and output voltage at which this happens in part A above). Considering just the current/voltage relationship for the PMOS device, plot |Idp| vs. Vout at this Vi on the same plot as step B, and label the curve Vi,max. D) What is the value of Vi for which the PMOS device leaves saturation? Again, considering only the PMOS device, plot Idp at this value of Vi on the same plot as B, and label the curve Vi,min. E) Based on these values, plot Vout vs Vi, paying careful attention to the location of the endpoints of the high gain region (calculated in parts C and D above). F) Based on the (Vi, Vout) pairs that you calculated in C & D, what is the gain of the amplifier in the high-gain region? What are the input and output range over which this gain is achieved? G) Calculate the gain for this amplifier using the small signal model evaluated at 3 different operating points for Vout: the edges of the high gain region, and the center of the high gain region. H) Use SPICE to make all of the same plots, and comment on any differences between your hand plots and the SPICE plots (there shouldn’t be any!). Use spice to plot the gain vs. Vi, and compare to your results in G. 100/1 100/1 3V Vi VBN
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