EE 140 ANALOG INTEGRATED CIRCUITS SPRING 2011 C. Nguyen PROBLEM SET #4 Issued: Tuesday, Feb.15, 2011 Due: Tuesday, Feb.22, 2011, 5:00 p.m. in the EE 140 homework box in 240 Cory 1. Write the expressions for the gain of each circuit in Fig. PS4.1 at very low and very high frequencies. Neglect other capacitances and assume = 0 for circuits (a) and (b) and = 0 for all of the circuits. The expressions should be in terms of the given elements and parameters of the small-signal equivalent circuits (i.e., gm, r, etc.) for the transistors used. (a) (b) (c) (d) Fig. PS4.1EE 140 ANALOG INTEGRATED CIRCUITS SPRING 2011 C. Nguyen 2. The circuit of Fig. PS4.2 produces a supply insensitive current. Calculate the ratio of small-signal variations in IBIAS to small-signal variations in VDD at low frequencies. Ignore the body effect but include finite transistor ro in this calculation. Fig. PS4.2 3. Consider the circuit of Fig. PS4.3, assuming (W/L)1-3 = 40/0.5, IREF = 0.3mA, and = 0. Use the following parameters for your calculation if necessary: Vth0 = 0.7V, 2F = 0.9V, LD = 0.08m, no = 350cm2/Vs, = 0.1V-1, tox = 9nm a. Determine Vb such that VX = VY; b. If Vb deviates from the value calculated in part a by 100mV, what is the mismatch between Iout and IREF; c. If the circuit fed by the cascode current source changes VP by 1V, how much does VY change. Fig. PS4.3EE 140 ANALOG INTEGRATED CIRCUITS SPRING 2011 C. Nguyen 4. A BICMOS amplifier is shown in Fig. PS4.4. Calculate the small-signal voltage gain vo/vi. Assume IS = 10-16 A, F = 100, rb = 0, VA∞ , nCox = 200uA/V, Vt = 0.6V, and = 0. Fig.
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