Review Important Aspects of Memory Multiplexing Controlled overlap CS162 Operating Systems and Systems Programming Lecture 12 Separate state of threads should not collide in physical memory Obviously unexpected overlap causes chaos Conversely would like the ability to overlap when desired for communication Translation Ability to translate accesses from one address space virtual to a different one physical When translation exists processor uses virtual addresses physical memory uses physical addresses Side effects Protection continued Address Translation Can be used to avoid overlap Can be used to give uniform view of memory to programs February 25 2010 Ion Stoica http inst eecs berkeley edu cs162 Protection Prevent access to private memory of other processes 2 25 10 Review General Address Translation Data 2 Code Data Heap Stack Heap 1 Code 1 Stack 2 Prog 1 Virtual Address Space 1 Limit Heap 2 Code 2 OS data Physical Address Space CS162 UCB Spring 2010 Physical Address This gives program the illusion that it is running on its own dedicated machine with memory starting at 0 Translation Map 2 Program gets continuous region of memory Addresses within program do not have to be relocated when program placed in different region of DRAM OS heap Stacks 2 25 10 Alter every address by adding base Generate error if address bigger than limit OS code Translation Map 1 Lec 12 2 Yes Error Can use base bounds limit for dynamic address translation Simple form of segmentation Prog 2 Virtual Address Space 2 Data 1 CS162 UCB Spring 2010 Review Simple Segmentation Base and Bounds CRAY 1 Base Virtual Address CPU DRAM Code Data Heap Stack Stack 1 Different pages of memory can be given special behavior Read Only Invisible to user programs etc Kernel data protected from User programs Programs protected from themselves 2 25 10 Lec 12 3 Page 1 CS162 UCB Spring 2010 Lec 12 4 Review Cons for Simple Segmentation Method Fragmentation problem complex memory allocation Goals for Today Address Translation Schemes Not every process is the same size Over time memory space becomes fragmented Really bad if want space to grow dynamically e g heap process 6 process 6 process 6 process 6 process 5 process 5 process 5 process 5 process 9 process 9 process 2 OS process 10 OS OS Discussion of Dual Mode operation Comparison among options OS Other problems for process maintenance Doesn t allow heap and stack to grow independently Want to put these as far apart in virtual memory space as possible so that they can grow as needed Note Some slides and or pictures in the following are adapted from slides 2005 Silberschatz Galvin and Gagne Gagne Many slides generated from lecture notes by Kubiatowicz Hard to do inter process sharing Want to share code segments when possible Want to share memory between processes 2 25 10 CS162 UCB Spring 2010 Segmentation Paging Multi level translation Paged page tables Inverted page tables 2 25 10 Lec 12 5 More Flexible Segmentation CS162 UCB Spring 2010 Implementation of Multi Segment Model Virtual Seg Offset Address 1 4 1 2 3 2 2 4 3 user view of memory space Base0 Base1 Base2 Base3 Base4 Base5 Base6 Base7 Limit0 Limit1 Limit2 Limit3 Limit4 Limit5 Limit6 Limit7 V V V N V N N V Error Physical Address Segment map resides in processor Segment number mapped into base limit pair Base added to offset to generate physical address Error check catches offset out of range physical memory space Logical View multiple separate segments As many chunks of physical memory as entries Typical Code Data Stack Others memory sharing etc Segment addressed by portion of virtual address However could be included in instruction instead x86 Example mov es bx ax Each segment is given region of contiguous memory Has a base and limit Can reside anywhereCS162 in physical memory 2 25 10 UCB Spring 2010 Lec 12 6 What is V N Can mark segments as invalid requires check as well 2 25 10 Lec 12 7 Page 2 CS162 UCB Spring 2010 Lec 12 8 Intel x86 Special Registers Example Four Segments 16 bit addresses 80386 Special Registers Seg 15 14 13 Offset Virtual Address Format 0 Seg ID 0 code 1 data 2 shared 3 stack 0x0000 0x0000 0x4000 0x4000 0x4800 0x5C00 Base 0x4000 0x4800 0xF000 0x0000 Limit 0x0800 0x1400 0x1000 0x3000 Might be shared 0x8000 Typical Segment Register Current Priority is RPL Of Code Segment CS 2 25 10 0xF000 Virtual Address Space CS162 UCB Spring 2010 2 25 10 Lec 12 9 Example of segment translation 0x240 0x244 0x360 0x364 0x368 0x4050 main la a0 varx jal strlen strlen li v0 0 count loop lb t0 a0 beq r0 t1 done varx dw 0x314159 Seg ID 0 code 1 data 2 shared 3 stack CS162 UCB Spring 2010 Physical Address Space CS162 UCB Spring 2010 Shared with Other Apps Lec 12 10 Administrivia Base 0x4000 0x4800 0xF000 0x0000 Midterm I coming up in 1 weeks Limit 0x0800 0x1400 0x1000 0x3000 Tuesday 3 9 3 30 6 30pm this room Should be 2 hour exam with extra time Closed book one page of hand written notes both sides No class on day of Midterm Extra Office Hours Mon 2 00 5 00 Let s simulate a bit of this code to see what happens PC 0x240 Fetch 0x240 Virtual segment 0 Offset 0x240 Physical address Base 0x4000 so physical addr 0x4240 Fetch instruction at 0x4240 Get la a0 varx Move 0x4050 a0 Move PC 4 PC 2 Fetch 0x244 Translated to Physical 0x4244 Get jal strlen Move 0x0248 ra return address Move 0x0360 PC 3 Fetch 0x360 Translated to Physical 0x4360 Get li v0 0 Move 0x0000 v0 Move PC 4 PC 4 Fetch 0x364 Translated to Physical 0x4364 Get lb t0 a0 Since a0 is 0x4050 try to load byte from 0x4050 Translate 0x4050 Virtual segment 1 Offset 0x50 Physical address Base 0x4800 Physical addr 0x4850 Load Byte from 0x4850 t0 Move PC 4 PC 2 25 10 Space for Other Apps 0xC000 Midterm Topics Topics Everything up to Thursday 3 4 History Concurrency Multithreading Synchronization Protection Address Spaces TLBs Make sure to fill out Group Evaluations Project 2 Initial Design Document due Thursday 3 4 Look at the lecture schedule to keep up with due dates 2 25 10 Lec 12 11 Page 3 CS162 UCB Spring 2010 Lec 12 12 Observations about Segmentation Virtual address space has holes Schematic View of Swapping Segmentation efficient for sparse address spaces A correct program should never address gaps except as mentioned in moment If it does trap to kernel and dump core When it is OK to address outside valid range This is how the stack and heap are allowed to grow For instance stack takes fault system automatically increases size of stack Extreme form of Context Switch Swapping
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