CS162 Operating Systems and Systems Programming Lecture 17 Disk Management and File Systems October 29 2008 Prof John Kubiatowicz http inst eecs berkeley edu cs162 Review Want Standard Interfaces to Devices Block Devices e g disk drives tape drives Cdrom Access blocks of data Commands include open read write seek Raw I O or file system access Memory mapped file access possible Character Devices e g keyboards mice serial ports some USB devices Single characters at a time Commands include get put Libraries layered on top allow line editing Network Devices e g Ethernet Wireless Bluetooth Different enough from block character to have own interface Unix and Windows include socket interface Separates network protocol from network operation Includes select functionality Usage pipes FIFOs streams queues mailboxes 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 2 Review How Does User Deal with Timing Blocking Interface Wait When request data e g read system call put process to sleep until data is ready When write data e g write system call put process to sleep until device is ready for data Non blocking Interface Don t Wait Returns quickly from read or write request with count of bytes successfully transferred Read may return nothing write may write nothing Asynchronous Interface Tell Me Later When request data take pointer to user s buffer return immediately later kernel fills buffer and notifies user When send data take pointer to user s buffer return immediately later kernel takes data and notifies user 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 3 Goals for Today Finish Discussing I O Systems Hardware Access Device Drivers Disk Performance Hardware performance parameters Queuing Theory File Systems Structure Naming Directories and Caching Note Some slides and or pictures in the following are adapted from slides 2005 Silberschatz Galvin and 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 4 Gagne Many slides Gagne generated from my lecture notes Main components of Intel Chipset Pentium 4 Northbridge Handles memory Graphics Southbridge I O PCI bus Disk controllers USB controllers Audio Serial I O Interrupt controller Timers 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 5 How does the processor talk to the device Processor Memory Bus CPU Interrupt Controller Regular Memory Bus Adaptor Bus Adaptor Address Other Devices Data or Buses Interrupt Request CPU interacts with a Controller Contains a set of registers that can be read and written May contain memory for request queues or bit mapped images Device Controller Bus Interface Hardware Controller read Addressable write Memory control status and or Registers Queues port 0x20 Memory Mapped Region 0x8f008020 Regardless of the complexity of the connections and buses processor accesses registers in two ways I O instructions in out instructions Example from the Intel architecture out 0x21 AL Memory mapped I O load store instructions Registers memory appear in physical address space I O accomplished with load and store instructions 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 6 Memory Mapped Display Controller Example Memory Mapped Hardware maps control registers and display memory to physical address space Addresses set by hardware jumpers or programming at boot time Simply writing to display memory also called the frame buffer changes image on screen 0x80020000 Graphics Command Queue 0x80010000 Display Memory 0x8000F000 Addr 0x8000F000 0x8000FFFF Writing graphics description to command queue area Say enter a set of triangles that describe some scene Addr 0x80010000 0x8001FFFF Command 0x0007F004 0x0007F000 Status Writing to the command register may cause on board graphics hardware to do something Say render the above scene Addr 0x0007F004 Can protect with page tables 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Physical Address Space Lec 17 7 Transferring Data To From Controller Programmed I O Each byte transferred via processor in out or load store Pro Simple hardware easy to program Con Consumes processor cycles proportional to data size Direct Memory Access Give controller access to memory bus Ask it to transfer data to from memory directly Sample interaction with DMA controller from book 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 8 A Kernel I O Structure 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 9 Administrivia Group Evaluations Both Projects 1 and 2 These MUST be done you will get a ZERO on your project score if you don t fill them out We will be asking you about them so make sure you are careful to fill them out honestly Next Week s Sections Fill out a survey form to see how class is going Give you an opportunity to give feedback Other things Group problems Don t wait Talk to TA talk to me Let s get things fixed 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 10 Device Drivers Device Driver Device specific code in the kernel that interacts directly with the device hardware Supports a standard internal interface Same kernel I O system can interact easily with different device drivers Special device specific configuration supported with the ioctl system call Device Drivers typically divided into two pieces Top half accessed in call path from system calls implements a set of standard cross device calls like open close read write ioctl strategy This is the kernel s interface to the device driver Top half will start I O to device may put thread to sleep until finished Bottom half run as interrupt routine Gets input or transfers next block of output May wake sleeping threads if I O now complete 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 11 Life Cycle of An I O Request User Program Kernel I O Subsystem Device Driver Top Half Device Driver Bottom Half Device Hardware 10 29 08 Kubiatowicz CS162 UCB Fall 2008 Lec 17 12 I O Device Notifying the OS The OS needs to know when The I O device has completed an operation The I O operation has encountered an error I O Interrupt Device generates an interrupt whenever it needs service Handled in bottom half of device driver Often run on special kernel level stack Pro handles unpredictable events well Con interrupts relatively high overhead Polling OS periodically checks a device specific status register I O device puts completion information in status register Could use timer to invoke lower half of drivers occasionally Pro low overhead Con may waste many cycles on polling if infrequent or unpredictable I O operations Actual devicesKubiatowicz combine both polling and 10 29 08 CS162 UCB
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