CS162 Operating Systems and Systems Programming Lecture 1 What is an Operating System?Who am I?Goals for TodayTechnology Trends: Moore’s LawSocietal Scale Information SystemsPeople-to-Computer Ratio Over TimeNew Challenge: Slowdown in Joy’s law of PerformanceManyCore Chips: The future is hereAnother Challenge: Power DensityComputer System OrganizationFunctionality comes with great complexity!Sample of Computer Architecture TopicsIncreasing Software ComplexityExample: Some Mars Rover (“Pathfinder”) RequirementsHow do we tame complexity?OS Tool: Virtual Machine AbstractionInterfaces Provide Important BoundariesVirtual MachinesVirtual Machines (con’t): Layers of OSsCourse AdministrationClass ScheduleTextbookTopic CoverageGradingGroup Project Simulates Industrial EnvironmentTypical Lecture FormatLecture GoalComputing FacilitiesAcademic Dishonesty PolicyWhat does an Operating System do?What is an Operating System,… Really?Operating System Definition (Cont.)What if we didn’t have an Operating System?Simple OS: What if only one application?MS-DOS Layer StructureMore thoughts on Simple OSMore complex OS: Multiple AppsExample: Protecting Processes from Each OtherAddress TranslationExample of Address TranslationAddress Translation DetailsDual Mode OperationUNIX System StructureNew Structures for Multicore chips? Tessellation: The Exploded OSOS Systems PrinciplesWhy Study Operating Systems?“In conclusion…”CS162Operating Systems andSystems ProgrammingLecture 1What is an Operating System?August 27th, 2008Prof. John Kubiatowiczhttp://inst.eecs.berkeley.edu/~cs162Lec 1.28/27/08 Kubiatowicz CS162 ©UCB Fall 2008Who am I?•Professor John Kubiatowicz (Prof “Kubi”)–Background in Hardware Design»Alewife project at MIT»Designed CMMU, Modified SPAR C processor»Helped to write operating system–Background in Operating Systems»Worked for Project Athena (MIT) »OS Developer (device drivers, network file systems)»Worked on Clustered High-Availability systems(CLAM Associates)»OS lead researcher for the new Berkeley PARLab(Tessellation OS). More later.–Peer-to-Peer»OceanStore project – Store your data for 1000 years»Tapestry and Bamboo – Find you data around globe–Quantum Computing»Well, this is just cool, but probably not aproposTessellationAlewifeOceanStoreLec 1.38/27/08 Kubiatowicz CS162 ©UCB Fall 2008Goals for Today•What is an Operating System?–And – what is it not?•Examples of Operating Systems design•Why study Operating Systems?•Oh, and “How does this class operate?”Interactive is important!Ask Questions!Note: Some slides and/or pictures in the following areadapted from slides ©2005 Silberschatz, Galvin, and Gagne. Slides courtesy of Kubiatowicz, AJ Shankar, George Necula, Alex Aiken, Eric Brewer, Ras Bodik, Ion Stoica, Doug Tygar, and David Wagner.Lec 1.48/27/08 Kubiatowicz CS162 ©UCB Fall 2008Technology Trends: Moore’s Law2X transistors/Chip Every 1.5 yearsCalled “Moore’s Law” Moore’s LawMicroprocessors have become smaller, denser, and more powerful.Gordon Moore (co-founder of Intel) predicted in 1965 that the transistor density of semiconductor chips would double roughly every 18 months.Lec 1.58/27/08 Kubiatowicz CS162 ©UCB Fall 2008Societal Scale Information SystemsScalable, Reliable,Secure ServicesMEMS for Sensor NetsInternetConnectivityClustersMassive ClusterGigabit EthernetDatabasesInformation CollectionRemote StorageOnline GamesCommerce…•The world is a large parallel system–Microprocessors in everything–Vast infrastructure behind themLec 1.68/27/08 Kubiatowicz CS162 ©UCB Fall 2008People-to-Computer Ratio Over Time•Today: Multiple CPUs/person!–Approaching 100s?From David CullerLec 1.78/27/08 Kubiatowicz CS162 ©UCB Fall 2008New Challenge: Slowdown in Joy’s law of Performance• VAX : 25%/year 1978 to 1986• RISC + x86: 52%/year 1986 to 2002• RISC + x86: ??%/year 2002 to presentFrom Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th edition, Sept. 15, 2006 Sea change in chip design: multiple “cores” or processors per chip3XLec 1.88/27/08 Kubiatowicz CS162 ©UCB Fall 2008ManyCore Chips: The future is here•“ManyCore” refers to many processors/chip–64? 128? Hard to say exact boundary•How to program these?–Use 2 CPUs for video/audio–Use 1 for word processor, 1 for browser–76 for virus checking???•Parallelism must be exploited at all levels•Intel 80-core multicore chip (Feb 2007)–80 simple cores–Two floating point engines /core–Mesh-like "network-on-a-chip“–100 million transistors–65nm feature sizeFrequency Voltage Power Bandwidth Performance3.16 GHz 0.95 V 62W 1.62 Terabits/s 1.01 Teraflops5.1 GHz 1.2 V 175W 2.61 Terabits/s 1.63 Teraflops5.7 GHz 1.35 V 265W 2.92 Terabits/s 1.81 TeraflopsLec 1.98/27/08 Kubiatowicz CS162 ©UCB Fall 2008Another Challenge: Power Density•Moore’s Law Extrapolation–Potential power density reaching amazing levels!•Flip side: Battery life very important–Moore’s law can yield more functionality at equivalent (or less) total energy consumptionLec 1.108/27/08 Kubiatowicz CS162 ©UCB Fall 2008Computer System Organization•Computer-system operation–One or more CPUs, device controllers connect through common bus providing access to shared memory–Concurrent execution of CPUs and devices competing for memory cyclesLec 1.118/27/08 Kubiatowicz CS162 ©UCB Fall 2008Functionality comes with great complexity!ProcCachesBussesMemoryI/O Devices:ControllersadaptersDisksDisplaysKeyboardsNetworksPentium IV ChipsetLec 1.128/27/08 Kubiatowicz CS162 ©UCB Fall 2008Sample of Computer Architecture TopicsInstruction Set ArchitecturePipelining, Hazard Resolution,Superscalar, Reordering, Prediction, Speculation,Vector, Dynamic CompilationAddressing,Protection,Exception HandlingL1 CacheL2 CacheDRAMDisks, WORM, TapeCoherence,Bandwidth,LatencyEmerging TechnologiesInterleavingBus protocolsRAIDVLSIInput/Output and StorageMemoryHierarchyPipelining and Instruction Level ParallelismNetworkCommunicationOther ProcessorsLec 1.138/27/08 Kubiatowicz CS162 ©UCB Fall 2008Increasing Software ComplexityFrom MIT’s 6.033 courseLec 1.148/27/08 Kubiatowicz CS162 ©UCB Fall 2008Example: Some Mars Rover (“Pathfinder”) Requirements•Pathfinder hardware limitations/complexity:–20Mhz processor, 128MB of DRAM, VxWorks OS –cameras, scientific instruments, batteries, solar panels, and locomotion equipment–Many independent
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