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CS162 Operating Systems and Systems Programming Lecture 10 Caches and TLBs February 23 2011 Ion Stoica http inst eecs berkeley edu cs162 Review Address Segmentation Virtual memory view 1111 1111 stack 1111 0000 1100 0000 1000 0000 0100 0000 0000 0000 heap Physical memory view Seg base limit 00 0001 0000 10 0000 01 0101 0000 10 0000 10 0111 0000 1 1000 11 1011 0000 1 0000 1110 000 0111 0000 0101 0000 data 0001 0000 0000 0000 code stack heap data code seg offset 2 23 Ion Stoica CS162 UCB Spring 2011 Lec 10 2 Review Address Segmentation Virtual memory view 1111 1111 1110 0000 stack 1100 0000 What happens if stack grows to 1110 0000 heap 1000 0000 0100 0000 0000 0000 Physical memory view Seg base limit 00 0001 0000 10 0000 01 0101 0000 10 0000 10 0111 0000 1 1000 11 1011 0000 1 0000 1110 000 0111 0000 0101 0000 data 0001 0000 0000 0000 code stack heap data code seg offset 2 23 Ion Stoica CS162 UCB Spring 2011 Lec 10 3 Review Address Segmentation Virtual memory view 1111 1111 1110 0000 stack 1100 0000 1000 0000 0100 0000 0000 0000 Physical memory view heap Seg base limit 00 0001 0000 10 0000 01 0101 0000 10 0000 10 0111 0000 1 1000 11 1011 0000 1 0000 1110 000 No room to grow Buffer overflow error 0111 0000 0101 0000 data 0001 0000 0000 0000 code stack heap data code seg offset 2 23 Ion Stoica CS162 UCB Spring 2011 Lec 10 4 Review Paging Virtual memory view 1111 1111 stack 1111 0000 1100 0000 1000 0000 0100 0000 0000 0000 page offset 2 23 heap data code Page Table 11111 11101 11110 11100 11101 null 11100 null 11011 null 11010 null 11001 null 11000 null 10111 null 10110 null 10101 null 10100 null 10011 null 10010 10000 10001 01111 10000 01110 01111 null 01110 null 01101 null 01100 null 01011 01101 01010 01100 01001 01011 01000 01010 00111 null 00110 null 00101 null 00100 null 00011 00101 00010 00100 00001 00011 Ion Stoica CS162 UCB Spring 2011 00000 00010 Physical memory view stack heap data code 1110 0000 0111 000 0101 000 0001 0000 0000 0000 Lec 10 5 Review Paging Virtual memory view 1111 1111 1110 0000 stack 1100 0000 What happens if stack grows to 1110 0000 heap 1000 0000 0100 0000 0000 0000 page offset 2 23 data code Page Table 11111 11101 11110 11100 11101 null 11100 null 11011 null 11010 null 11001 null 11000 null 10111 null 10110 null 10101 null 10100 null 10011 null 10010 10000 10001 01111 10000 01110 01111 null 01110 null 01101 null 01100 null 01011 01101 01010 01100 01001 01011 01000 01010 00111 null 00110 null 00101 null 00100 null 00011 00101 00010 00100 00001 00011 Ion Stoica CS162 UCB Spring 2011 00000 00010 Physical memory view stack heap data code 1110 0000 0111 000 0101 000 0001 0000 0000 0000 Lec 10 6 Review Paging Virtual memory view 1111 1111 1110 0000 stack 1100 0000 1000 0000 0100 0000 0000 0000 page offset 2 23 heap data code Page Table 11111 11101 11110 11100 11101 10111 11100 10110 11011 null 11010 null 11001 null 11000 null 10111 null 10110 null 10101 null 10100 null 10011 null 10010 10000 10001 01111 10000 01110 01111 null 01110 null 01101 null 01100 null 01011 01101 01010 01100 01001 01011 01000 01010 00111 null 00110 null 00101 null 00100 null 00011 00101 00010 00100 00001 00011 Ion Stoica CS162 UCB Spring 2011 00000 00010 Physical memory view stack 1110 0000 stack Allocate new pages where heap room 0111 000 data code 0101 000 0001 0000 0000 0000 Lec 10 7 Review Two Level Paging Virtual memory view 1111 1111 1110 0000 stack 0100 0000 11 11101 Page Table level 1 1100 0000 1000 0000 Page Tables level 2 heap data 111 110 101 100 011 010 001 000 null null null null 10 11100 01 10111 00 10110 11 null 10 10000 01 01111 00 01110 0000 0000 code stack 11 01101 10 01100 01 01011 00 01010 10 00100 01 00011 00 00010 1110 0000 stack heap 11 00101 page2 Physical memory view data code 0111 000 0101 000 0001 0000 0000 0000 page1 offset 2 23 Ion Stoica CS162 UCB Spring 2011 Lec 10 8 Review Two Level Paging Virtual memory view Page Tables level 2 stack 11 11101 Page Table level 1 1001 0000 heap data 111 110 101 100 011 010 001 000 null null null null 10 11100 01 10111 00 10110 11 null 10 10000 01 01111 00 01110 2 23 stack 11 01101 10 01100 01 01011 00 01010 10 00100 01 00011 00 00010 Ion Stoica CS162 UCB Spring 2011 1110 0000 stack heap 11 00101 code Physical memory view 1000 0000 data code 0001 0000 0000 0000 Lec 10 9 Review Inverted Table Virtual memory view 1111 1111 1110 0000 stack Inverted Table hash virt page physical page 1100 0000 1000 0000 0100 0000 0000 0000 Physical memory view heap data 11111 11110 11101 11100 10010 10001 10000 01011 01010 01001 10000 00011 00010 00001 00000 11101 11100 10111 10110 10000 01111 01110 01101 01100 01011 01010 00101 00100 00011 00010 code stack 1110 0000 stack heap data code 0111 000 0101 000 0001 0000 0000 0000 page offset 2 23 Ion Stoica CS162 UCB Spring 2011 Lec 10 10 Address Translation Comparison Advantages Segmentation Fast context switching Segment mapping maintained by CPU Paging No external single level fragmentation page No external Paged segmentation fragmentation Two level Table size memory pages used by program Inverted Table 2 23 Disadvantages External fragmentation Large size Table size virtual memory Internal fragmentation Multiple memory references per page access Internal fragmentation Hash function more complex Ion Stoica CS162 UCB Spring 2011 Lec 10 11 Simple Page Table Example i j k 0x08 l e f g 0x04 h a b c 0x00 d 0000 1000 1 3 0000 0100 4 0000 0100 0000 1100 0001 0000 Page Table Virtual 0000 0000 Memory virtual offset page Example 4 byte pages 2 23 Ion Stoica CS162 UCB Spring 2011 a b c 0x10 d e f g 0x0C h i j k 0x04 l 0x00 Physical Memory Lec 10 12 How is the translation accomplished CPU Virtual Addresses MMU Physical Addresses What exactly happens inside Memory Management Unit MMU One possibility Hardware Tree Traversal For each virtual address takes page table base pointer and traverses the page table in hardware Generates a Page Fault if invalid Paget Table Entry PTE Fault handler will decide what to do see next Pros Relatively fast but still many memory accesses Cons Inflexible Complex hardware Another possibility Software Each traversal done in software Pros Very flexible Cons Every translation must invoke Fault In fact need way to cache translations for either case 2 23 Ion Stoica CS162 UCB Spring 2011 Lec 10 13 Goals for Today Caching Misses Organization Translation Look aside Buffers TLBs Note Some slides and or pictures in the following are adapted from slides 2005 Silberschatz Galvin and Gagne


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Berkeley COMPSCI 162 - Lecture 10 Caches and TLBs

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