Review Important Aspects of Memory Multiplexing Controlled overlap Ability to explicitly control whether to processes should share or not a region of memory CS162 Operating Systems and Systems Programming Lecture 9 Protection Prevent access to private memory of other processes Kernel data protected from User programs Programs protected from themselves Different pages of memory can be given special behavior Read Only Invisible to user programs etc Address Translation Translation February 16 2011 Ion Stoica http inst eecs berkeley edu cs162 Ability to translate accesses from one address space virtual to a different one physical When translation exists processor uses virtual addresses physical memory uses physical addresses Side effects 2 16 Can be used to avoid overlap Can be used to give uniform view of memory to programs Ion Stoica CS162 UCB Spring 2011 Uniprograming Loading Program in Memory Memory Goals for Today Address Translation Schemes 0x0000 Segmentation Paging Multi level translation Paged page tables Inverted page tables 0x0300 00000020 Program view of memory data1 32 start lw r1 0 data1 jal checkit loop addi r1 r1 1 bnz r1 r0 loop checkit Discussion of Dual Mode operation dw 0x300 0x900 0x904 0x908 0x90C 00000020 8C2000C0 0C000340 2021FFFF 1420FFFF Note Some slides and or pictures in the following are adapted from slides 2005 Silberschatz Galvin and Gagne Many slides generated from lecture notes by Kubiatowicz 2 16 Ion Stoica CS162 UCB Spring 2011 Lec 9 2 0x0900 8C2000C0 0C000340 2021FFFF 1420FFFF 0xFFFF 2 16 Lec 9 3 Page 1 Ion Stoica CS162 UCB Spring 2011 Lec 9 4 Multiprograming Where do you load program Memory Example of General Address Translation 0x0300 Program view of memory data1 dw 32 start lw r1 0 data1 jal checkit loop addi r1 r1 1 bnz r1 r0 loop checkit 0x300 0x900 0x904 0x908 0x90C 00000020 8C2000C0 0C000340 2021FFFF 1420FFFF 0x0900 Data 2 Code Data Heap Stack 0x0000 App X Heap 1 Code 1 Stack 2 Prog 1 Virtual Address Space 1 Heap 2 Code 2 OS code Need address translation Ion Stoica CS162 UCB Spring 2011 2 16 Lec 9 5 Segmentation with Base and Limit Registers Physical Address Space Ion Stoica CS162 UCB Spring 2011 1 1 4 1 DRAM Physical Address 2 3 2 2 4 3 Alter address of every load store by adding base User allowed to read write within segment user view of memory space Accesses are relative to segment so don t have to be relocated when program moved to different segment physical memory space Logical View multiple separate segments Typical Code Data Stack Others memory sharing etc User may have multiple segments available e g x86 Loads and stores include segment ID in opcode x86 Example mov es bx ax Operating system moves around segment base pointers as necessary Ion Stoica CS162 UCB Spring 2011 Lec 9 6 More Flexible Segmentation No Error Could use base limit for dynamic address translation often called segmentation 2 16 Translation Map 2 Base Virtual Address Limit OS data OS heap Stacks 0xFFFF CPU Prog 2 Virtual Address Space 2 Data 1 Translation Map 1 2 16 Code Data Heap Stack Stack 1 Each segment is given region of contiguous memory 2 16 Lec 9 7 Page 2 Has a base and limit Can reside anywhere in physical memory Ion Stoica CS162 UCB Spring 2011 Lec 9 8 Implementation of Multi Segment Model Virtual Seg Address Offset Base0 Limit0 Base1 Limit1 Base2 Limit2 Base3 Limit3 Base4 Limit4 Base5 Limit5 Base6 Limit6 Base7 Limit7 V V V N V N N V Example Four Segments 16 bit addresses Error Seg Offset 15 14 13 0 Virtual Address Format Physical Address Segment map resides in processor Segment number mapped into base limit pair Base added to offset to generate physical address Error check catches offset out of range Seg ID 0 code 1 data 2 shared 3 stack 0x0000 0x0000 0x4000 0x4000 0x4800 Base 0x4000 0x4800 0xF000 0x0000 Limit 0x0800 0x1400 0x1000 0x3000 Might be shared 0x5C00 0x8000 As many chunks of physical memory as entries Space for Other Apps 0xC000 Segment addressed by portion of virtual address However could be included in instruction instead 0xF000 Shared with Other Apps x86 Example mov es bx ax What is V N Virtual Address Space Can mark segments as invalid requires check as well 2 16 Ion Stoica CS162 UCB Spring 2011 2 16 Lec 9 9 Example of segment translation 0x240 0x244 0x360 0x364 0x368 0x4050 main strlen loop varx la a0 varx jal strlen li v0 0 count lb t0 a0 beq r0 t1 done dw 0x314159 Seg ID 0 code 1 data 2 shared 3 stack Base 0x4000 0x4800 0xF000 0x0000 Ion Stoica CS162 UCB Spring 2011 Ion Stoica CS162 UCB Spring 2011 Lec 9 10 Issues with simple segmentation method Limit 0x0800 0x1400 0x1000 0x3000 process 6 process 6 process 6 process 6 process 5 process 5 process 5 process 5 process 9 process 9 process 2 OS Let s simulate a bit of this code to see what happens PC 0x240 1 Fetch 0x240 Virtual segment 0 Offset 0x240 Physical address Base 0x4000 so physical addr 0x4240 Fetch instruction at 0x4240 Get la a0 varx Move 0x4050 a0 Move PC 4 PC 2 Fetch 0x244 Translated to Physical 0x4244 Get jal strlen Move 0x0248 ra return address Move 0x0360 PC 3 Fetch 0x360 Translated to Physical 0x4360 Get li v0 0 Move 0x0000 v0 Move PC 4 PC 4 Fetch 0x364 Translated to Physical 0x4364 Get lb t0 a0 Since a0 is 0x4050 try to load byte from 0x4050 Translate 0x4050 Virtual segment 1 Offset 0x50 Physical address Base 0x4800 Physical addr 0x4850 Load Byte from 0x4850 t0 Move PC 4 PC 2 16 Physical Address Space process 10 OS OS OS Fragmentation problem Not every process is the same size Over time memory space becomes fragmented Hard to do inter process sharing Want to share code segments when possible Want to share memory between processes Helped by providing multiple segments per process Need enough physical memory for every process 2 16 Lec 9 11 Page 3 Ion Stoica CS162 UCB Spring 2011 Lec 9 12 Observations about Segmentation Schematic View of Swapping A correct program should never address gaps except as mentioned in moment If it does trap to kernel and dump core When it is OK to address outside valid range This is how the stack and heap are allowed to grow For instance stack takes fault system automatically increases size of stack Need protection mode in segment table Extreme form of Context Switch Swapping For example code segment would be read only Data and stack would be read write stores allowed Shared segment could be read only or read write In order to make room for next process some or all of the previous process is moved to disk This greatly increases the cost of context
View Full Document
Unlocking...