Review Address Segmentation Virtual memory view 1111 1111 stack 1111 0000 CS162 Operating Systems and Systems Programming Lecture 10 Physical memory view 1110 000 1100 0000 Caches and TLBs 1000 0000 heap Seg base limit 00 0001 0000 10 0000 01 0101 0000 10 0000 10 0111 0000 1 1000 11 1011 0000 1 0000 0111 0000 February 23 2011 Ion Stoica http inst eecs berkeley edu cs162 0101 0000 data stack heap data 0100 0000 0000 0000 0001 0000 code code 0000 0000 seg offset 2 23 Review Address Segmentation Virtual memory view 1111 1111 1110 0000 1110 000 1100 0000 What happens if stack grows to 1110 0000 heap Seg base limit 00 0001 0000 10 0000 01 0101 0000 10 0000 10 0111 0000 1 1000 Review Address Segmentation 11 1011 0000 1 0000 0111 0000 0101 0000 data stack 1110 0000 1000 0000 heap heap base limit 00 0001 0000 10 0000 01 0101 0000 10 0000 10 0111 0000 1 1000 11 1011 0000 1 0000 data stack No room to grow Buffer overflow error 0101 0000 data heap data 0100 0000 0001 0000 code code 0000 0000 0000 0000 seg offset 2 23 1110 000 Seg 0111 0000 0100 0000 0000 0000 Physical memory view stack 1100 0000 1000 0000 Lec 10 2 Virtual memory view 1111 1111 Physical memory view stack Ion Stoica CS162 UCB Spring 2011 0001 0000 code code 0000 0000 seg offset Ion Stoica CS162 UCB Spring 2011 2 23 Lec 10 3 Page 1 Ion Stoica CS162 UCB Spring 2011 Lec 10 4 Review Paging Virtual memory view 1111 1111 stack 1111 0000 1100 0000 1000 0000 heap data 0100 0000 0000 0000 code page offset 2 23 Review Paging Page Table Physical 11111 11101 11110 11100 11101 null 11100 null 11011 null 11010 null 11001 null 11000 null 10111 null 10110 null 10101 null 10100 null 10011 null 10010 10000 10001 01111 10000 01110 01111 null 01110 null 01101 null 01100 null 01011 01101 01010 01100 01001 01011 01000 01010 00111 null 00110 null 00101 null 00100 null 00011 00101 00010 00100 00001 00011 Ion Stoica CS162 UCB Spring 2011 00000 00010 stack stack 1110 0000 1110 0000 1100 0000 What happens if stack grows to 1110 0000 heap heap data 1000 0000 0111 000 0101 000 data 0100 0000 code 0001 0000 0000 0000 0000 0000 2 23 Lec 10 5 stack 1110 0000 1100 0000 1000 0000 heap data 0100 0000 0000 0000 page offset 2 23 code Physical 11111 11101 11110 11100 11101 null 11100 null 11011 null 11010 null 11001 null 11000 null 10111 null 10110 null 10101 null 10100 null 10011 null 10010 10000 10001 01111 10000 01110 01111 null 01110 null 01101 null 01100 null 01011 01101 01010 01100 01001 01011 01000 01010 00111 null 00110 null 00101 null 00100 null 00011 00101 00010 00100 00001 00011 Ion Stoica CS162 UCB Spring 2011 00000 00010 memory view stack heap data code 1110 0000 0111 000 0101 000 0001 0000 0000 0000 Lec 10 6 Review Two Level Paging Page Table 11111 11101 11110 11100 11101 10111 11100 10110 11011 null 11010 null 11001 null 11000 null 10111 null 10110 null 10101 null 10100 null 10011 null 10010 10000 10001 01111 10000 01110 01111 null 01110 null 01101 null 01100 null 01011 01101 01010 01100 01001 01011 01000 01010 00111 null 00110 null 00101 null 00100 null 00011 00101 00010 00100 00001 00011 Ion Stoica CS162 UCB Spring 2011 00000 00010 code page offset Review Paging Virtual memory view 1111 1111 Page Table Virtual memory view 1111 1111 memory view Virtual memory view 1111 1111 Physical memory view stack stack 1110 0000 1110 0000 Page Table level 1 1100 0000 stack Allocate new pages where heap room 0111 000 data 1000 0000 0101 000 heap page2 0001 0000 0000 0000 0000 0000 111 110 101 100 011 010 001 000 null null null null 11 10 01 00 11101 11100 10111 10110 Physical memory view stack 1110 0000 stack 11 null 10 10000 01 01111 00 01110 heap data 11 10 01 00 01101 01100 01011 01010 code 11 10 01 00 00101 00100 00011 00010 0100 0000 code Page Tables level 2 data code 0111 000 0101 000 0001 0000 0000 0000 page1 offset 2 23 Lec 10 7 Page 2 Ion Stoica CS162 UCB Spring 2011 Lec 10 8 Review Two Level Paging Virtual memory view Page Tables level 2 stack Page Table level 1 1001 0000 heap 111 110 101 100 011 010 001 000 null null null null data code 11 10 01 00 11101 11100 10111 10110 Review Inverted Table Virtual memory view 1111 1111 Physical memory view stack 1110 0000 stack 1110 0000 Inverted Table hash virt page physical page 1100 0000 stack 11 null 10 10000 01 01111 00 01110 heap 11 10 01 00 01101 01100 01011 01010 11 10 01 00 00101 00100 00011 00010 Physical memory view stack 1000 0000 1000 0000 11111 11110 11101 11100 10010 10001 10000 01011 01010 01001 10000 00011 00010 00001 00000 heap data data 0100 0000 code 0001 0000 0000 0000 0000 0000 11101 11100 10111 10110 10000 01111 01110 01101 01100 01011 01010 00101 00100 00011 00010 1110 0000 stack heap data code code 0111 000 0101 000 0001 0000 0000 0000 page offset 2 23 Ion Stoica CS162 UCB Spring 2011 2 23 Lec 10 9 Ion Stoica CS162 UCB Spring 2011 Address Translation Comparison Advantages Segmentation Fast context switching Segment mapping maintained by CPU Paging single level page Paged segmentation Two level pages Inverted Table 2 23 Lec 10 10 Simple Page Table Example Disadvantages External fragmentation i j k 0x08 l e f g 0x04 h a b c 0x00 d Large size Table size virtual memory Internal fragmentation No external Multiple memory fragmentation references per page Table size memory access used by program Internal fragmentation No external fragmentation 0000 0100 1 3 0000 0100 4 0000 1100 0001 0000 Page Table 0000 0000 Virtual Memory virtual offset page Example 4 byte pages Hash function more complex Ion Stoica CS162 UCB Spring 2011 0000 1000 2 23 Lec 10 11 Page 3 Ion Stoica CS162 UCB Spring 2011 a b c 0x10 d e f g 0x0C h i j k 0x04 l 0x00 Physical Memory Lec 10 12 How is the translation accomplished CPU Virtual Addresses MMU Goals for Today Physical Addresses Caching Misses Organization What exactly happens inside Memory Management Unit MMU One possibility Hardware Tree Traversal Translation Look aside Buffers TLBs For each virtual address takes page table base pointer and traverses the page table in hardware Generates a Page Fault if invalid Paget Table Entry PTE Fault handler will decide what to do see next Pros Relatively fast but still many memory accesses Cons Inflexible Complex hardware Another possibility Software Each traversal done in software Pros Very flexible Cons Every translation must invoke Fault In fact need way to cache translations for either case 2 23 Ion Stoica CS162 UCB Spring 2011 Note Some slides and or pictures in the following are adapted from slides 2005 Silberschatz Galvin
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