CS162 Operating Systems and Systems Programming Lecture 16 I O Systems March 31 2008 Prof Anthony D Joseph http inst eecs berkeley edu cs162 Review Memory Hierarchy of a Modern Computer System Take advantage of the principle of locality to Present as much memory as in the cheapest technology Provide access at speed offered by the fastest technology Processor Control On Chip Cache Registers Datapath Second Level Cache SRAM Speed ns 1s 10s 100s Size bytes 100s Ks Ms 3 31 08 Secondary Storage Disk Main Memory DRAM 100s Ms Tertiary Storage Tape 10 000 000 10 000 000 000 s s 10s ms 10s sec Gs Ts Joseph CS162 UCB Spring 2008 Lec 16 2 Goals for Today I O Systems Hardware Access Device Drivers Queuing Theory Note Some slides and or pictures in the following are adapted from slides 2005 Silberschatz Galvin and 3 31 08 Josephgenerated CS162 UCB Spring Lec 16 3 Gagne Many slides Gagne from2008 my lecture notes The Requirements of I O So far in this course We have learned how to manage CPU memory What about I O Without I O computers are useless disembodied brains But thousands of devices each slightly different How can we standardize the interfaces to these devices Devices unreliable media failures and transmission errors How can we make them reliable Devices unpredictable and or slow How can we manage them if we don t know what they will do or how they will perform Some operational parameters Byte Block Some devices provide single byte at a time e g keyboard Others provide whole blocks e g disks networks etc Sequential Random Some devices must be accessed sequentially e g tape Others can be accessed randomly e g disk cd etc Polling Interrupts 3 31 08 Some devices require continual monitoring Others generate interrupts when they need service Joseph CS162 UCB Spring 2008 Lec 16 4 Modern I O Systems 3 31 08 Joseph CS162 UCB Spring 2008 Lec 16 5 Example Device Transfer Rates Sun Enterprise 6000 Device Rates vary over many orders of magnitude System better be able to handle this wide range Better not have high overhead byte for fast devices Better not waste time waiting for slow devices 3 31 08 Joseph CS162 UCB Spring 2008 Lec 16 6 The Goal of the I O Subsystem Provide Uniform Interfaces Despite Wide Range of Different Devices This code works on many different devices FILE fd fopen dev something rw for int i 0 i 10 i fprintf fd Count d n i close fd Why Because code that controls devices device driver implements standard interface We will try to get a flavor for what is involved in actually controlling devices in rest of lecture Can only scratch surface 3 31 08 Joseph CS162 UCB Spring 2008 Lec 16 7 Administrivia Would you like an extra 5 for your course grade Attend lectures and sections 5 of grade is participation Midterm 1 was only 15 Project 3 design doc due next Monday 4 7 at 11 59pm Midterm 2 is in two weeks Wed 4 16 67 30pm in 10 Evans 3 31 08 Joseph CS162 UCB Spring 2008 Lec 16 8 Want Standard Interfaces to Devices Block Devices e g disk drives tape drives DVDROM Access blocks of data Commands include open read write seek Raw I O or file system access Memory mapped file access possible Character Devices e g keyboards mice serial ports some USB devices Single characters at a time Commands include get put Libraries layered on top allow line editing Network Devices e g Ethernet Wireless Bluetooth Different enough from block character to have own interface Unix and Windows include socket interface Separates network protocol from network operation Includes select functionality Usage 3 31 08 pipes Joseph FIFOs streams queues mailboxes CS162 UCB Spring 2008 Lec 16 9 How Does User Deal with Timing Blocking Interface Wait When request data e g read system call put process to sleep until data is ready When write data e g write system call put process to sleep until device is ready for data Non blocking Interface Don t Wait Returns quickly from read or write request with count of bytes successfully transferred Read may return nothing write may write nothing Asynchronous Interface Tell Me Later When request data take pointer to user s buffer return immediately later kernel fills buffer and notifies user When send data take pointer to user s buffer return immediately later kernel takes data and notifies user 3 31 08 Joseph CS162 UCB Spring 2008 Lec 16 10 Main components of Intel Chipset Pentium 4 Northbridge Handles memory Graphics Southbridge I O PCI bus Disk controllers USB controllers Audio Serial I O Interrupt controller Timers 3 31 08 Joseph CS162 UCB Spring 2008 Lec 16 11 How does the processor actually talk to the device Processor Memory Bus Regular Memory CPU Interrupt Controller Bus Adaptor Bus Adaptor Address Other Devices Data or Buses Interrupt Request CPU interacts with a Controller Contains a set of registers that can be read and written May contain memory for request queues or bit mapped images Device Controller Bus Interface Hardware Controller read Addressable write Memory control status and or Registers Queues port 0x20 Memory Mapped Region 0x8f008020 Regardless of the complexity of the connections and buses processor accesses registers in two ways I O instructions in out instructions Example from the Intel architecture out 0x21 AL Memory mapped I O load store instructions Registers memory appear in physical address space I O accomplished with load and store instructions 3 31 08 Joseph CS162 UCB Spring 2008 Lec 16 12 Example Memory Mapped Display Controller Memory Mapped Hardware maps control registers and display memory into physical address space 0x80020000 Graphics Command Queue Addresses set by hardware jumpers or programming at boot 0x80010000 time Display Simply writing to display memory also called the frame buffer changes image on screen Memory 0x8000F000 Addr 0x8000F000 0x8000FFFF Writing graphics description to command queue area Say enter a set of triangles that describe some scene Addr 0x80010000 0x8001FFFF Command 0x0007F004 0x0007F000 Status Writing to the command register may cause on board graphics hardware to do something Say render the above scene Addr 0x0007F004 Can protect with page tables 3 31 08 Joseph CS162 UCB Spring 2008 Physical Address Space Lec 16 13 Transfering Data To From Controller Programmed I O Each byte transferred via processor in out or load store Pro Simple hardware easy to program Con Consumes processor cycles proportional to data size Direct Memory Access Give controller access to memory bus Ask it to transfer data to from memory directly
View Full Document
Unlocking...