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Berkeley COMPSCI 162 - Lecture 16 I/O Systems

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CS162 Operating Systems and Systems Programming Lecture 16 I/O SystemsReview: Memory Hierarchy of a Modern Computer SystemGoals for TodayThe Requirements of I/OModern I/O SystemsExample Device-Transfer Rates (Sun Enterprise 6000)The Goal of the I/O SubsystemAdministriviaWant Standard Interfaces to DevicesHow Does User Deal with Timing?Main components of Intel Chipset: Pentium 4How does the processor actually talk to the device?Example: Memory-Mapped Display ControllerTransfering Data To/From ControllerA Kernel I/O StructureDevice DriversLife Cycle of An I/O RequestI/O Device Notifying the OSBREAKI/O PerformanceIntroduction to Queuing TheoryBackground: Use of random distributionsA Little Queuing Theory: Some ResultsA Little Queuing Theory: An ExampleSummaryCS162Operating Systems andSystems ProgrammingLecture 16I/O SystemsMarch 31, 2008Prof. Anthony D. Josephhttp://inst.eecs.berkeley.edu/~cs162Lec 16.23/31/08 Joseph CS162 ©UCB Spring 2008Review: Memory Hierarchy of a Modern Computer System•Take advantage of the principle of locality to:–Present as much memory as in the cheapest technology–Provide access at speed offered by the fastest technologyOn-ChipCacheRegistersControlDatapathSecondaryStorage(Disk)ProcessorMainMemory(DRAM)SecondLevelCache(SRAM)1s10,000,000s (10s ms)Speed (ns): 10s-100s 100s100s GsSize (bytes): Ks-Ms MsTertiaryStorage(Tape)10,000,000,000s (10s sec)TsLec 16.33/31/08 Joseph CS162 ©UCB Spring 2008Goals for Today•I/O Systems–Hardware Access–Device Drivers•Queuing TheoryNote: Some slides and/or pictures in the following areadapted from slides ©2005 Silberschatz, Galvin, and Gagne Note: Some slides and/or pictures in the following areadapted from slides ©2005 Silberschatz, Galvin, and Gagne. Many slides generated from my lecture notes by Kubiatowicz.Lec 16.43/31/08 Joseph CS162 ©UCB Spring 2008The Requirements of I/O•So far in this course:–We have learned how to manage CPU, memory•What about I/O?–Without I/O, computers are useless (disembodied brains?)–But… thousands of devices, each slightly different»How can we standardize the interfaces to these devices?–Devices unreliable: media failures and transmission errors»How can we make them reliable???–Devices unpredictable and/or slow»How can we manage them if we don’t know what they will do or how they will perform?•Some operational parameters:–Byte/Block»Some devices provide single byte at a time (e.g. keyboard)»Others provide whole blocks (e.g. disks, networks, etc)–Sequential/Random»Some devices must be accessed sequentially (e.g. tape)»Others can be accessed randomly (e.g. disk, cd, etc.)–Polling/Interrupts»Some devices require continual monitoring»Others generate interrupts when they need serviceLec 16.53/31/08 Joseph CS162 ©UCB Spring 2008Modern I/O SystemsLec 16.63/31/08 Joseph CS162 ©UCB Spring 2008Example Device-Transfer Rates (Sun Enterprise 6000)•Device Rates vary over many orders of magnitude–System better be able to handle this wide range–Better not have high overhead/byte for fast devices!–Better not waste time waiting for slow devicesLec 16.73/31/08 Joseph CS162 ©UCB Spring 2008The Goal of the I/O Subsystem•Provide Uniform Interfaces, Despite Wide Range of Different Devices–This code works on many different devices:FILE fd = fopen(“/dev/something”,”rw”);for (int i = 0; i < 10; i++) {fprintf(fd,”Count %d\n”,i);}close(fd);–Why? Because code that controls devices (“device driver”) implements standard interface.•We will try to get a flavor for what is involved in actually controlling devices in rest of lecture–Can only scratch surface!Lec 16.83/31/08 Joseph CS162 ©UCB Spring 2008Administrivia•Would you like an extra 5% for your course grade?–Attend lectures and sections! 5% of grade is participation–Midterm 1 was only 15%•Project #3 design doc due next Monday (4/7) at 11:59pm•Midterm #2 is in two weeks (Wed 4/16) 6-7:30pm in 10 EvansLec 16.93/31/08 Joseph CS162 ©UCB Spring 2008Want Standard Interfaces to Devices•Block Devices: e.g. disk drives, tape drives, DVD-ROM–Access blocks of data–Commands include open(), read(), write(), seek()–Raw I/O or file-system access–Memory-mapped file access possible•Character Devices: e.g. keyboards, mice, serial ports, some USB devices–Single characters at a time–Commands include get(), put()–Libraries layered on top allow line editing•Network Devices: e.g. Ethernet, Wireless, Bluetooth–Different enough from block/character to have own interface–Unix and Windows include socket interface»Separates network protocol from network operation»Includes select() functionality–Usage: pipes, FIFOs, streams, queues, mailboxesLec 16.103/31/08 Joseph CS162 ©UCB Spring 2008How Does User Deal with Timing?•Blocking Interface: “Wait”–When request data (e.g. read() system call), put process to sleep until data is ready–When write data (e.g. write() system call), put process to sleep until device is ready for data•Non-blocking Interface: “Don’t Wait”–Returns quickly from read or write request with count of bytes successfully transferred–Read may return nothing, write may write nothing•Asynchronous Interface: “Tell Me Later”–When request data, take pointer to user’s buffer, return immediately; later kernel fills buffer and notifies user–When send data, take pointer to user’s buffer, return immediately; later kernel takes data and notifies userLec 16.113/31/08 Joseph CS162 ©UCB Spring 2008Main components of Intel Chipset: Pentium 4•Northbridge:–Handles memory–Graphics•Southbridge: I/O–PCI bus–Disk controllers–USB controllers–Audio–Serial I/O–Interrupt controller–TimersLec 16.123/31/08 Joseph CS162 ©UCB Spring 2008DeviceControllerreadwritecontrolstatusAddressableMemoryand/orQueuesRegisters(port 0x20)HardwareControllerMemory MappedRegion: 0x8f008020BusInterfaceHow does the processor actually talk to the device?•CPU interacts with a Controller–Contains a set of registers that can be read and written–May contain memory for request queues or bit-mapped images •Regardless of the complexity of the connections and buses, processor accesses registers in two ways: –I/O instructions: in/out instructions»Example from the Intel architecture: out 0x21,AL–Memory mapped I/O: load/store instructions»Registers/memory appear in physical address space»I/O accomplished with load and store


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Berkeley COMPSCI 162 - Lecture 16 I/O Systems

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