U of U CS 6710 - CS 6710 lecture Notes (30 pages)

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CS 6710 lecture Notes



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CS 6710 lecture Notes

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Pages:
30
School:
University of Utah
Course:
Cs 6710 - Digital VLSI Design

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CS ECE 5710 6710 Introduction to Layout Inverter Layout Example Layout Design Rules Composite Layout Drawing the mask layers that will be used by the fabrication folks to make the devices Very different from schematics In schematics you re describing the LOGICAL connections In layout you re describing the PHYSICAL placement of everything Use colored regions to define the different layers that are patterned onto the silicon 1 N type Transistor D G Vgs Vds S i electrons N type from the top Top view shows patterns that make up the transistor 2 Diffusion Mask Mask for just the diffused regions Polysilicon Mask Mask for just the polysilicon areas 3 Diffusion active Mask Diffused active mask is actually drawn as a solid rectangle Polysilicon Mask Polysilicon mask goes on top of the active 4 Combine the two masks You get an N type transistor There are other steps in the process P type transistor Same type of masks as the N type But you have to get the substrate right and you have to dope the diffusion differently 5 General CMOS cross section Note that the general substrate is P type The N substrate for the P transistor is in a well There are lots of other layers Thick SiO2 oxide field oxide Thin SiO2 oxide gate oxide Metal for interconnect Cutaway Photo 6 A Cutaway View CMOS structure with both transistor types and top view structure Top View from that Section Note the different mask layers that correspond to the different transistor layers In particular note the N well and P select layers 7 This is an Inverter In Vdd Gnd Out Layout in Cadence Each color corresponds to a mask layer Draw rectangles to describe mask regions A LOT of things to keep in mind connectivity functionality design rules 8 What are the layers Metal3 Metal2 Metal1 CC Via Via2 Polysilicon Poly Nselect Pselect Nactive Pactive Nwell What are the layers Metal3 Via2 Metal2 Via Metal1 CC Polysilicon Poly Nselect Pselect Nactive Pactive Nwell 9 Photo of Interconnect Back to the Inverter Let s walk through



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