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CSE477VLSI Digital CircuitsFall 2003 Lecture 22: Shifters, Decoders, MuxesReview: Basic Building BlocksParallel Programmable ShiftersA Programmable Binary ShifterA Programmable Binary Shifter4-bit Barrel Shifter4-bit Barrel Shifter4-bit Barrel Shifter LayoutLogarithmic Shifter Structure8-bit Logarithmic Shifter8-bit Logarithmic Shifter8-bit Logarithmic Shifter Layout SliceShifter Implementation ComparisonsDecodersDynamic NOR Row DecoderDynamic NOR Row DecoderDynamic NAND Row DecoderDynamic NAND Row DecoderBuilding Big Decoders from SmallMultiplexersReview: TG 2x1 MultiplexerBuilding Big Muxes from SmallBuilding Big Muxes from SmallReview: Datapath Bit-Sliced OrganizationLayout of Bit-Sliced DatapathsLayout of Bit-sliced DatapathsAlpha 21264 Integer Unit DatapathNext Lecture and RemindersCSE477 L22 Shifters, etc..1 Irwin&Vijay, PSU, 2003CSE477VLSI Digital CircuitsFall 2003Lecture 22: Shifters, Decoders, MuxesMary Jane Irwin ( www.cse.psu.edu/~mji ) www.cse.psu.edu/~cg477[Adapted from Rabaey’s Digital Integrated Circuits, Second Edition, ©2003 J. Rabaey, A. Chandrakasan, B. Nikolic]CSE477 L22 Shifters, etc..2 Irwin&Vijay, PSU, 2003Review: Basic Building Blocks Datapathz Execution units- Adder, multiplier, divider, shifter, etc.z Register file and pipeline registersz Multiplexers, decoders Controlz Finite state machines (PLA, ROM, random logic) Interconnectz Switches, arbiters, buses Memoryz Caches (SRAMs), TLBs, DRAMs, buffersCSE477 L22 Shifters, etc..3 Irwin&Vijay, PSU, 2003Parallel Programmable ShiftersShift amount (Sh2Sh1Sh0)Shift direction (left, right)Shift type (logical,arithmetic, circular)=ControlData InData OutShifters used in multipliers, floating point unitsConsume lots of area if done in random logic gatesCSE477 L22 Shifters, etc..4 Irwin&Vijay, PSU, 2003A Programmable Binary Shifter0 0rgt nop leftAiAi-1rgt nop left BiBi-1A1A0010A1A0A1A01000A1A1A0001A00AiBiBi-1Ai-10 0CSE477 L22 Shifters, etc..5 Irwin&Vijay, PSU, 2003A Programmable Binary Shifter0 0rgt nop leftAiAi-1AiAi-1rgt nop left BiBi-1A1A0010A1A0A1A01000A1A1A0001A00BiBi-10 0CSE477 L22 Shifters, etc..6 Irwin&Vijay, PSU, 20034-bit Barrel ShifterA0A1A2A3B0B1B2B3!Sh1!Sh0!Sh1Sh0Example: !Sh1!Sh0= 1B3B2B1B0= A3A2A1A0!Sh1Sh0= 1B3B2B1B0= A3A3A2A1Sh1!Sh0= 1B3B2B1B0= A3A3A3A2Sh1Sh0= 1B3B2B1B0= A3A3A3A3Area dominated by wiring!Sh1Sh0Sh1!Sh0Sh1!Sh0Sh1Sh0Sh1Sh0CSE477 L22 Shifters, etc..7 Irwin&Vijay, PSU, 20034-bit Barrel ShifterA0A1A2A3B0B1B2B3Area dominated by wiringExample: !Sh1!Sh0= 1B3B2B1B0= A3A2A1A0!Sh1Sh0= 1B3B2B1B0= A3A3A2A1Sh1!Sh0= 1B3B2B1B0= A3A3A3A2Sh1Sh0= 1B3B2B1B0= A3A3A3A3Sh1!Sh0!Sh1Sh0!Sh1!Sh0Sh1Sh0Sh1Sh0Sh1!Sh0!Sh1Sh0CSE477 L22 Shifters, etc..8 Irwin&Vijay, PSU, 20034-bit Barrel Shifter LayoutBufferSh3Sh2Sh1Sh0A3A2A1A0Widthbarrel~ 2 pmNN = max shift distance, pm= metal pitchDelay ~ 1 fet + N diff capsWidthbarrelOnly one Sh#active at a timelSh1Sh0Sh1!Sh0!Sh1Sh0!Sh1!Sh0CSE477 L22 Shifters, etc..9 Irwin&Vijay, PSU, 2003Logarithmic Shifter Structure xxxData InData Outshifts of 0or 1 bits!Sh0Sh00,1shiftsshifts of 0or 2 bits!Sh1Sh10,1,2,3shiftsshifts of 0or 4 bits!Sh2Sh20,1,2,3,4,5,6,7 shiftsshifts of 0or 8 bits!Sh3Sh30,1,2…15 shiftsshifts of 0or 16 bits!Sh4Sh40,1,2…31 shiftsCSE477 L22 Shifters, etc..10 Irwin&Vijay, PSU, 20038-bit Logarithmic ShifterSh0!Sh0Sh1!Sh1Sh2!Sh2A3B3A2B2A1B1B0A0CSE477 L22 Shifters, etc..11 Irwin&Vijay, PSU, 20038-bit Logarithmic Shifter!Sh0Sh0!Sh1Sh1!Sh2Sh2000111A3B3A2B2A1B1B0A0log N stagesCSE477 L22 Shifters, etc..12 Irwin&Vijay, PSU, 20038-bit Logarithmic Shifter Layout SliceA0B3B2B1B0A1A2A312 4Widthlog~ pm(2K+(1+2+…+2K-1)) = pm(2K+2K-1)K = log2NDelay ~ K fets + 2 diff capsCSE477 L22 Shifters, etc..13 Irwin&Vijay, PSU, 2003Shifter Implementation ComparisonsBarrel LogarithmicWidth Speed Width Speed1 + N diffs K + 2 diffs3 + 24 + 25 + 26 + 21 + 81 + 161 + 321 + 642 N pmpm(2K+2K-1)13 pm23 pm41 pm75 pm16 pm32 pm64 pm128 pmNK8316 432 564 6Barrel shifter needs an K x 2Kshift amount decoderCSE477 L22 Shifters, etc..14 Irwin&Vijay, PSU, 2003Decoders Decodes inputs to activate one of many outputsz In random gate logic need two inverters, four 2-input nandgates, four inverters plus enable logicz how about for a 3-to-8, 4-to-16, etc. decoder?EnableOut0 = !In1 & !In0In0Out1 = !In1 & In02x4In1Out2 = In1 & !In0Out3 = In1 & In0CSE477 L22 Shifters, etc..15 Irwin&Vijay, PSU, 2003Dynamic NOR Row DecoderVDD!A0A0!A1A1Out3Out2Out1Out0prechargeGND GNDCSE477 L22 Shifters, etc..16 Irwin&Vijay, PSU, 2003Dynamic NOR Row DecoderVDD!A0A0!A1A1Out3Out2Out1Out0precharge0 →10 1 0 11111→ 0→ 0→ 0→ 1on onononGND GNDCSE477 L22 Shifters, etc..17 Irwin&Vijay, PSU, 2003Dynamic NAND Row Decoder!A0A0!A1A1Out0prechargeOut1Out2Out3CSE477 L22 Shifters, etc..18 Irwin&Vijay, PSU, 2003Dynamic NAND Row Decoder!A0A0!A1A1Out0prechargeOut1Out2Out30 1 0 11111→ 1→ 1→ 1→ 0onon0 →1CSE477 L22 Shifters, etc..19 Irwin&Vijay, PSU, 2003Building Big Decoders from SmallActive low enable Active low output1x2enable A4A3A22x42x42x42x4. . .1 → 0 → 1A1A00 0 0 0 1CSE477 L22 Shifters, etc..20 Irwin&Vijay, PSU, 2003Multiplexers Selects one of several inputs to gate to the single outputz In random gate logic need two inverters, four 3-input nands, one 4-input nandz how about for an 8x1, 16x1, etc. mux?S1S04x1In0In1Out = In0 & !S1 & !S0 |In1 & !S1 & S0 |In2 & S1 & !S0 |In3 & S1 & S0In2In3CSE477 L22 Shifters, etc..21 Irwin&Vijay, PSU, 2003Review: TG 2x1 MultiplexerGNDVDDIn1In2SSS S FSS!SIn2In1FF = !((In1 & S) | (In2&!S))CSE477 L22 Shifters, etc..22 Irwin&Vijay, PSU, 2003Building Big Muxes from SmallA0S0A12x1A2A32x12x1S1OutCSE477 L22 Shifters, etc..23 Irwin&Vijay, PSU, 2003Building Big Muxes from SmallA0S0A12x1A2A32x12x1S1Out10CSE477 L22 Shifters, etc..24 Irwin&Vijay, PSU, 2003Review: Datapath Bit-Sliced OrganizationControl FlowRegister FilePipeline RegisterAdderShifterPipeline RegisterMultiplexerMultiplexerData FlowPipeline RegisterPipeline RegisterBit 0Bit 1Bit 2Bit 3From I$decoderTo/From D$Tile identical bit-slice elementsCSE477 L22 Shifters, etc..25 Irwin&Vijay, PSU, 2003Layout of Bit-Sliced DatapathsCSE477 L22 Shifters, etc..26 Irwin&Vijay, PSU, 2003Layout of Bit-sliced DatapathsWithout feedthroughs or pitch matching (4.2µm2)With feedthroughs(3.2µm2)With feedthroughs and pitch matching (2.2µm2)CSE477 L22 Shifters, etc..27 Irwin&Vijay,


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PSU CSE 477 - Shifters Decoders Muxes

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