CSE477VLSI Digital CircuitsFall 2003Lecture 01: IntroductionCourse ContentsCourse AdministrationGrading InformationBackground from CSE471 and EE310Course StructureTransistor RevolutionMOSFET TechnologyMoore’s LawMoore’s Law in MicroprocessorsIntel 4004 Microprocessor (10000 nm)Intel P2 Microprocessor (280 nm)State-of-the Art: Lead MicroprocessorsEvolution in DRAM Chip CapacityDie Size GrowthClock FrequencyPower DissipationPower DensityTechnology Directions: “Old” SIA RoadmapWhy Scaling?Design Abstraction LevelsDesign Productivity TrendsMajor Design ChallengesNext Lecture and RemindersCSE477 L01 Introduction.1 Irwin&Vijay, PSU, 2003CSE477VLSI Digital CircuitsFall 2003Lecture 01: IntroductionMary Jane Irwin ( www.cse.psu.edu/~mji ) www.cse.psu.edu/~cg477[Adapted from Rabaey’s Digital Integrated Circuits, Second Edition, ©2003 J. Rabaey, A. Chandrakasan, B. Nikolic]CSE477 L01 Introduction.2 Irwin&Vijay, PSU, 2003Course Contents Introduction to digital integrated circuitsz CMOS devices and manufacturing technology. CMOS logic gates and their layout. Propagation delay, noise margins, and power dissipation. Combinational (e.g., arithmetic) and sequential circuit design. Memory circuit design. Course goalsz Ability to design and implement CMOS digital circuits and optimize them with respect to different constraints: size (cost), speed, power dissipation, and reliability Course prerequisitesz EE 310. Electronic Circuit Designz CSE 471. Logic Design of Digital SystemsCSE477 L01 Introduction.3 Irwin&Vijay, PSU, 2003Course Administration Instructor: Mary Jane [email protected]/~mji227 Pond LabOffice Hrs: T 16:00-17:00 & W 9:30-10:45 TA: Feihui [email protected] HammondOffice Hrs: TBD Labs: Accounts on 101 Pond Lab machines URL: www.cse.psu.edu/~cg477 Text: Digital Integrated Circuits, 2ndEdition Rabaey et. al., ©2003 Slides: pdf on the course web page after lectureCSE477 L01 Introduction.4 Irwin&Vijay, PSU, 2003Grading Information Grade determinatesz Midterm Exam ~25%- Monday, October 20th, 20:15 to 22:15, Location TBDz Final Exam ~25%- Monday, December 15th, 10:10 to noon, Location TBDz Homeworks/Lab Assignments (5) ~20%- Due at the beginning of class (or, if submitted electronically, by 17:00 on the due date). No late assignments will be accepted.z Design Project (teams of ~2) ~25%z In-class pop quizzes ~ 5% Please let me know about exam conflicts ASAP Grades will be posted on the course homepagez Must submit email request for change of grade after discussions with the TA (Homeworks/Lab Assignments) or instructor (Exams)z December 9thdeadline for filing grade corrections; no requests for grade changes will be accepted after this dateCSE477 L01 Introduction.5 Irwin&Vijay, PSU, 2003Background from CSE471 and EE310 Basic circuit theoryz resistance, capacitance, inductancez MOS gate characteristics Hardware description languagez VHDL or verilog Use of modern EDA toolsz simulation, synthesis, validation (e.g., Synopsys)z schematic capture tools (e.g., LogicWorks) Logic designz logical minimization, FSMs, component designCSE477 L01 Introduction.6 Irwin&Vijay, PSU, 2003Course Structure Design and tool intensive classz Micromagic (MMI) “max” and “sue” for layout- Online documentation and tutorialsz HSPICE for circuit simulationz unix (Sun/Solaris) operating system environment Lectures:z 2 weeks on the CMOS inverter z 3 weeks on static and dynamic CMOS gatesz 2 weeks on C, R, and L effects z 2 week on sequential CMOS circuits z 2 weeks on design of datapath structuresz 2 weeks on memory designz 1 week on design for test, margining, scaling, trends z 1 week examsCSE477 L01 Introduction.7 Irwin&Vijay, PSU, 2003“Executives might make the final decisions about what would be produced, but engineers would provide most of the ideas for new products. After all, engineers were the people who really knew the state of the art and who were therefore best equipped to prophesy changes in it.”The Soul of a New Machine, Kidder, pg 35CSE477 L01 Introduction.8 Irwin&Vijay, PSU, 2003Transistor Revolution Transistor –Bardeen (Bell Labs) in 1947 Bipolar transistor – Schockley in 1949 First bipolar digital logic gate – Harris in 1956 First monolithic IC – Jack Kilby in 1959 First commercial IC logic gates – Fairchild 1960 TTL – 1962 into the 1990’s ECL – 1974 into the 1980’sCSE477 L01 Introduction.9 Irwin&Vijay, PSU, 2003MOSFET Technology MOSFET transistor - Lilienfeld (Canada) in 1925 and Heil (England) in 1935 CMOS – 1960’s, but plagued with manufacturing problems (used in watches due to their power limitations) PMOS in 1960’s (calculators) NMOS in 1970’s (4004, 8080) – for speed CMOS in 1980’s – preferred MOSFET technology because of power benefits BiCMOS, Gallium-Arsenide, Silicon-Germanium SOI, Copper-Low K, strained silicon, …CSE477 L01 Introduction.10 Irwin&Vijay, PSU, 2003Moore’s Law In 1965, Gordon Moore predicted that the number of transistors that can be integrated on a die would double every 18 months (i.e., grow exponentially with time). Amazingly visionary – million transistor/chip barrier was crossed in the 1980’s.z 2300 transistors, 1 MHz clock (Intel 4004) - 1971z 16 Million transistors (Ultra Sparc III)z 42 Million, 2 GHz clock (Intel P4) - 2001z 140 Million transistor (HP PA-8500)CSE477 L01 Introduction.11 Irwin&Vijay, PSU, 2003Moore’s Law in Microprocessors# transistors on lead microprocessors double every 2 years# transistors on lead microprocessors double every 2 years40048008808080858086286386486Pentium® procP60.0010.010.111010010001970 1980 1990 2000 2010YearTransistors (MT)2X growth in 1.96 years!Courtesy, IntelCSE477 L01 Introduction.12 Irwin&Vijay, PSU, 2003Intel 4004 Microprocessor (10000 nm)CSE477 L01 Introduction.13 Irwin&Vijay, PSU, 2003Intel P2 Microprocessor (280 nm)CSE477 L01 Introduction.14 Irwin&Vijay, PSU, 2003State-of-the Art: Lead MicroprocessorsCSE477 L01 Introduction.15 Irwin&Vijay, PSU, 2003642561,0004,00016,00064,000256,0001,000,0004,000,00016,000,00064,000,000101001000100001000001000000100000001000000001980 1983 1986 1989 1992 1995 1998 2001 2004 2007 2010YearKbit capacity/chipEvolution in DRAM Chip Capacity1.6-2.4 µm1.0-1.2 µm0.7-0.8 µm0.5-0.6 µm0.35-0.4 µm0.18-0.25 µm0.13 µm0.1 µm0.07 µmhuman memoryhuman DNAencyclopedia2 hrs CD audio30 sec