Xilinx University Program Virtex-IIPro Development SystemContentsFiguresTablesXUP Virtex-IIPro Development SystemFeaturesGeneral DescriptionBlock DiagramBoard ComponentsVirtex-IIPro FPGAPower Supplies and FPGA ConfigurationMulti-Gigabit TransceiversSystem RAMSystem ACE Compact Flash ControllerFast Ethernet InterfaceSerial PortsUser LEDs, Switches, and Push ButtonsExpansion ConnectorsXSGA OutputAC97 Audio CODECCPU Trace and Debug PortUSB 2 Programming InterfaceUsing the SystemConfiguring the Power SuppliesConfiguring the FPGAClock Generation and DistributionUsing the DIMM Module DDR SDRAMUsing the XSGA OutputUsing the AC97 Audio CODEC and Power AmpUsing the LEDs and SwitchesUsing the Expansion Headers and Digilent Expansion ConnectorsUsing the CPU Debug Port and CPU ResetUsing the Serial PortsUsing the Fast Ethernet Network InterfaceUsing System ACE Controllers for Non-Volatile StorageUsing the Multi-Gigabit TransceiversConfiguring the FPGA from the Embedded USB Configuration PortProgramming the Platform FLASH PROM User AreaRestoring the Golden FPGA ConfigurationUsing the Golden FPGA Configuration for System Self-TestHardware-Based TestsPower Supply and RESET TestClock, Push Button, DIP Switch, LED, and Audio Amp TestSVGA Gray Scale TestSVGA Color Output TestSilicon Serial Number and PS/2 Serial Port TestProcessor-Based TestsMGT Serial ATA TestEMAC Web Server TestAC97 Audio TestSystem ACE TestDDR SDRAM TestExpansion Port TestUser Constraint Files (UCF)Links to the Component Data SheetsFPGA Related DocumentationConfiguration SourcesDDR SDRAM ModulesAudio ProcessingXSGA Video OutputEthernet NetworkingPower SuppliesRXilinx University Program Virtex-II Pro Development SystemHardware Reference ManualUG069 (v1.0) March 8, 2005XUP Virtex-II Pro Development System www.xilinx.com UG069 (v1.0) March 8, 2005"Xilinx" and the Xilinx logo shown above are registered trademarks of Xilinx, Inc. Any rights not expressly granted herein are reserved. CoolRunner, RocketChips, Rocket IP, Spartan, StateBENCH, StateCAD, Virtex, XACT, XC2064, XC3090, XC4005, and XC5210 are registered trademarks of Xilinx, Inc. The shadow X shown above is a trademark of Xilinx, Inc.ACE Controller, ACE Flash, A.K.A. Speed, Alliance Series, AllianceCORE, Bencher, ChipScope, Configurable Logic Cell, CORE Generator, CoreLINX, Dual Block, EZTag, Fast CLK, Fast CONNECT, Fast FLASH, FastMap, Fast Zero Power, Foundation, Gigabit Speeds...and Beyond!, HardWire, HDL Bencher, IRL, J Drive, JBits, LCA, LogiBLOX, Logic Cell, LogiCORE, LogicProfessor, MicroBlaze, MicroVia, MultiLINX, NanoBlaze, PicoBlaze, PLUSASM, PowerGuide, PowerMaze, QPro, Real-PCI, RocketIO, SelectIO, SelectRAM, SelectRAM+, Silicon Xpresso, Smartguide, Smart-IP, SmartSearch, SMARTswitch, System ACE, Testbench In A Minute, TrueMap, UIM, VectorMaze, VersaBlock, VersaRing, Virtex-II Pro, Virtex-II EasyPath, Wave Table, WebFITTER, WebPACK, WebPOWERED, XABEL, XACT-Floorplanner, XACT-Performance, XACTstep Advanced, XACTstep Foundry, XAM, XAPP, X-BLOX +, XC designated products, XChecker, XDM, XEPLD, Xilinx Foundation Series, Xilinx XDTV, Xinfo, XSI, XtremeDSP and ZERO+ are trademarks of Xilinx, Inc. The Programmable Logic Company is a service mark of Xilinx, Inc. All other trademarks are the property of their respective owners.Xilinx, Inc. does not assume any liability arising out of the application or use of any product described or shown herein; nor does it convey any license under its patents, copyrights, or maskwork rights or any rights of others. Xilinx, Inc. reserves the right to make changes, at any time, in order to improve reliability, function or design and to supply the best product possible. Xilinx, Inc. will not assume responsibility for the use of any circuitry described herein other than circuitry entirely embodied in its products. Xilinx provides any design, code, or information shown or described herein “as is.” By providing the design, code, or information as one possible implementation of a feature, application, or standard, Xilinx makes no representation that such implementation is free from any claims of infringement. You are responsible for obtaining any rights you may require for your implementation. Xilinx expressly disclaims any warranty whatsoever with respect to the adequacy of any such implementation, including but not limited to any warranties or representations that the implementation is free from claims of infringement, as well as any implied warranties of merchantability or fitness for a particular purpose. Xilinx, Inc. devices and products are protected under U.S. Patents. Other U.S. and foreign patents pending. Xilinx, Inc. does not represent that devices shown or products described herein are free from patent infringement or from any other third party right. Xilinx, Inc. assumes no obligation to correct any errors contained herein or to advise any user of this text of any correction if such be made. Xilinx, Inc. will not assume any liability for the accuracy or correctness of any engineering or software support or assistance provided to a user.Xilinx products are not intended for use in life support appliances, devices, or systems. Use of a Xilinx product in such applications without the written consent of the appropriate Xilinx officer is prohibited.The contents of this manual are owned and copyrighted by Xilinx. Copyright 1994-2005 Xilinx, Inc. All Rights Reserved. Except as stated herein, none of the material may be copied, reproduced, distributed, republished, downloaded, displayed, posted, or transmitted in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Any unauthorized use of any material contained in this manual may violate copyright laws, trademark laws, the laws of privacy and publicity, and communications regulations and statutes.XUP Virtex-II Pro Development System UG069 (v1.0) March 8, 2005The following table shows the revision history for this document. RVersion Revision03/08/05 1.0 Initial Xilinx release. (DRAFT)UG069 (v1.0) March 8, 2005 www.xilinx.com XUP Virtex-II Pro Development SystemContentsChapter 1: XUP Virtex-II Pro Development SystemFeatures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .