CS 140L Lecture 1PowerPoint PresentationFPGAs (Field Programmable Gate Arrays)CMOS Logic (3.2 – 3.6)1. Transistors (FET) Field Effect TransistorSlide 6CS 140L Lecture 1Professor CK Cheng10/2/02Behavior descriptionC, System C, Verilog, VHDLRegister Transfer LevelVerilog, VHDLNetlist of LogicPhysical LayoutLogic SynthesisPlacement, RoutingLogic DiagramMask FabricationFPGAs1. Data representation 2. Progress, Design Automation3. Analysis: Functional, TimingFPGAs (Field Programmable Gate Arrays) Switch MatrixWiring ChannelsProgrammable Logic BlockSwitches-SRAM based (Flash memory)-antifuseDisadvantages: Penalty on area, density, speedAdvantages: Flexibility, low startup costs, low risk, revisions without changing the hardwareCMOS Logic (3.2 – 3.6)Complementary Metal-Oxide Semiconductor1. Transistors (FET) Field Effect TransistorGSDNMOSDWGSDLG =1 => D =S { D = 1 => S = 0.8 D = 0 => S = 0G = 0 => D&S are separated.GCDSr LW,c WxLAC ’CBGSDPMOSG = 0 => D =S { D = 1 => S = 1 D = 0 => S = 0.2G = 1 => D&S are
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