Implementing Run-Time Support for DRAFTS: Distributed Real-time Applications Fault Tolerant SchedulingOutlineObjectivesMotivationDRAFTS ProjectSynthesis Design FlowCode Generation: ApproachCode Generation: ComponentsCode Generation: Work AccomplishedConclusions01/13/19 1Implementing Run-Time Support for DRAFTS: Distributed Real-time Applications Fault Tolerant SchedulingMark McKelvinEE249 Embedded System DesignDecember 03, 2002Mentor: Claudio Pinello01/13/19 2OutlineObjectivesMotivationDRAFTS ProjectSynthesis Design FlowCode Generation–Approach–Components–Work AccomplishedConclusions01/13/19 3ObjectivesTo implement a run-time environment that models a real-time distributed fault tolerant system (code generation)To create a library of functions that provides communication services to the system designerTo create a library of functions that define an architecture for prototyping01/13/19 4MotivationComplex systems are more integrated and often more safety critical–Examples: A distributed car system and drive-by-wire applicationsExpensive design process–Validation of architecture and software integration–Repetitive processExpensive implementation–Late validation of architecture in the design process01/13/19 5DRAFTS ProjectAutomates synthesis from a fault tolerant data flow model of computation to executable code–Uses a fault tolerant data-flow model of computation for safety critical applications–Solution approach: redundancy for safety and reliabilitySynthesis based approach:–Allows customizable replication of SW and HW–Enables fast architecture exploration–Handles the complications of redundancy management through code generation (debugged and portable libraries)01/13/19 6Synthesis Design FlowApplication ArchitectureCode GenerationDRAFTS(FTDF library)Fault Tolerant Application01/13/19 7Code Generation: ApproachVirtual prototyping toolDesigner uses a library of functions to implement communication, architecture, and placement of actors on the architectureCode created interfaces the FTDF library functionality with a specific architectureArchitectureCode generationFTDF Library01/13/19 8Code Generation: ComponentsImplemented on a Linux based operating systemConsists of multiple Virtual CPUs, where each models a single CPU Communication: virtual CPUs (VCPUs) uses UDP/IP and virtual channels (VCHs), which model FTDF communication semanticsUser ApplicationFTDF LibraryCode Generation (Library)Linux Operating SystemUDP/IPPhysical Network (Ethernet)VCPUVCPUVCH01/13/19 9Code Generation: Work AccomplishedCommunication library functions implemented that allow designer to specify the number of VCPUs in networkFunctions that send and receive data between VCPUs A basis for building virtual channels into the virtual architectureShared memory communication between actors - read and write functionality01/13/19 10ConclusionsAdvantages of code generation–Inexpensive–Modular and customizable–Designer can introduce redundancy in the virtual networkDisadvantages of code generation–Not a true performance analysis tool–Lacks 1:1 mapping of computation to architecture–Introduces added overheadFuture Work–Test complete functionality in an application that uses the FTDF library–Implement FTDF semantics in code (i.e., firing rules, faults)–Has potential to be used as a Metropolis back-end tool for rapid prototyping of a FTDF
View Full Document
Unlocking...