6 002 Circuits and Systems Final Review CIRCUITS AND SYSTEMS FINAL REVOLUTIONS Jason Kim Page 1 6 002 Circuits and Systems Outline of Topics Resistor Networks concepts 1st Order Circuits concepts 2nd Order Circuits concepts Node Method KCL KVL Superposition Thevenin and Norton equivalent circuit models Power Consituitive Laws RC netwroks RL networks Homogenous and Particular solution Time constant response to an impulse power Low High Band Notch pass filters sinusodial steady state transients Impedance Model Bode Plots Magnitude and Phase LC networks LRC networks damping coefficient natural frequency o Underdamped Critical Overdamped Systems Resonance Q factor Half power point Sinusodial steady state transients Power real reactive Impedance Model ELI ICE Bode Plots Magnitude and Phase Digital Abstraction concepts Boolean Logic truth table formula gates and transistor level primitive laws DeMorgan s Law formula and gate equivalent MSP minumum sum of products MPS minimum product of sums MOSFET Transistors concepts Large Signal Model S SR SCS SVR Small Signal Model Saturation Linear Region Ron Loadline Operating Point Input Output Resistence Current Gain Power Gain Noise Margin Op Amp Circuits concepts Diodes concepts Single Multiple input op amp circuits differentiator integrator adder subtractor opamp with R L C negative feedback positive feedback Bode Plots Magnitude and Phase Input Output resistence Schmitt Trigger Hysteresis Cascaded stages Energy and Power concepts i v characteristics model diode w R L C and op amp Peak detection Clipper circuits Incremental Analysis Energy and Power relationships nMOS and CMOS logic inverter power dissipation static and dynamic power power reduction techiniques Page 0 1 Primitive Elements Resistor time domain V IR freq domain Z R Series R 1 R 2 1 2 Parallel R 1 R 2 R R R1 R2 R1 Vi Ii Vo R2 R2 V o V i R1 R2 Voltage Divider Vi I2 R1 R1 I 2 Ii R1 R2 R2 Current Divider Resistor Network N unknowns N equations most primitive approach Node Analysis KCL KVL KCL Sum of all currents entering and leaving a node is zero KVL Sum of all voltages around a closed loop path is zero be careful with polarities 1 LABEL all current directions and voltage polarities Remember currents flow from to 2 write KCL KVL Equation 3 substitute and solve Simplification by inspection Thevenin Equivalent Circuit Model Norton Equivalent Circuit Model Rth Vth same i v characteristics at the ports Voc Vth IN RN Isc IN Three variables Vth Voc Rth RN and IN Isc They are related by Voc Isc Rth Vth Voc Leave the port open thus no current flow at the port and solve for Voc For a resistive network this gives you a point on the V axis of the i v plot IN Isc Short the port thus no voltage across the port and solve for Isc flowing out of and into For a resistive network this gives you a point on the I axis of the i v plot Rth Set all sources to zero except dependent sources Solve the resistive network When setting sources to zero V source becomes short and I source becomes open Rth may also be found by attaching Itest and Vtest and setting Rth Vtest Itest If dependent sources are present set only the independent sources to zero and attach Itest and Vtest Use KCL and KVL to find the expression Vtest Itest Rth Itest Original Circuit N Vtest note the direction of Itest and polarity of Vtest V test R th I test For both Thevenin Norton E C M s they have the same power consumption at the port as the original circuit but not for its individual components Power dissipated at Rth does not equal power dissipated at the resistors of the original circuit Same holds for the power delivered by the sources in the Thevenin model and the original circuit Thevenin and Norton E C M s are for terminal i v characteristics only Power Real Power IV I2R V2 R energy dissipated as heat 1 T T Power I t V t dt 0 Page 1 1 Primitive Elements Superposition In a linear network with a number of independent sources the response can be found by summing the response to each independent sources acting alone with all other independent sources set to zero VR when only V1 is on Linear Network with n sources R VR VR VR 1 V2 n 0 VR 2 V 1 V 3 n 0 VR n V1 n 1 0 1 Leave one source on and turn off all other sources Voltage source off short Current source off open 2 Find the effect from the on source 3 Repeat for each sources 4 Sum the effect from each sources to obtain the total effect For cases where a linear dependent source is present along with multiple independent sources DO NOT turn off the dependent source Leave the dependent source on and carry it in your expressions Tackle the dependent source term last by solving linear equations Remember that the variable which the dependent source is depended on is affected by the individual independent sources that you are turning on and off Capacitor time domain I C dV dt 1 Cs 1 jwC freq domain Z High Frequency Short Low Frequency Open C C C1 C2 1 2 Series Parallel C 1 C2 Vc 0 Vc 0 except when the input source is an impulse Vc t is continuous while Ic t may be discontinuous I C E Current I LEADS Voltage EMF by 90o mnemonic ELI ICE Energy Conservation I dt Q CV 1 2 2 Energy Stored E CV no energy dissipation Note Two identical capacitors C1 and C2 in series may act like an open circuit after a long time where the total voltage across the capacitors are split between the two cap s For this case Vc does not discharge to zero but VC1 VC2 Inductor time domain V L dI dt freq domain Z Ls jwL High Frequency Open Low Frequency Short Series L 1 L 2 L L L1 L2 1 2 Parallel IL 0 IL 0 except when the input source is an impulse IL t is continuous while VL t may be discontinuous Page 2 R VC1 C1 C2 VC1 0 VC2 0 VC2 1 Primitive Elements E L I Voltage EMF LEADS Current I by 90o mnemonic ELI ICE Energy Conservation V dt LI 1 2 2 Energy Stored E LI no energy dissipation Note Two identical inductors L1 and L2 in parallel may act like a short circuit after a long time and have current flow through this loop indefinitely For this case iL is not zero but iL1 iL2 L1 i1 L2 i2 iL1 0 iL2 0 LC Series o Short Parallel o Open Energy transfers between inductors and capacitors sinusodially 180o out of phase Also Vc peaks when IL 0 and IL peaks when Vc 0 Page 3 R 2 First Order Circuits First Order RC RL Circuits RC Network iC R iL Vi RL Network C Vc Ii Vc 0 0 KVL V i I c R V c KCL Ic C L VL IL 0 0 KVL V i I c R …
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