Massachusetts Institute of TechnologyDepartment of Electrical Engineering and Computer Science6.002 – Electronic CircuitsFall 2004Homework #11Handout F04-053Due 12/3/04IntroductionThis homework assignment focuses on the analysis and design of a system for playing back adigitally-stored audio signal. Additionally, this assignment serves as the pre-lab exercises forLab #4, which will involve the construction, testing and demonstration of the audio playbacksystem. Consequently, you should save a copy of your results for use during Lab #4.A block diagram of the audio playback system is shown in Figure 1. At the center of the systemis a digital memory in which 131,072 samples of the audio signal are stored. Each sample in thememory has a unique numerical address between 0 and 131,071, inclusive. Consecutive samples arestored at consecutive addresses.To obtain 131,072 consecutive samples of the audio signal, 16.384 seconds of continuous analogaudio signal are first sampled at an 8-kHz rate. The analog audio samples are then digitized by an8-bit analog-to-digital converter. That is, the samples are quantized to take on one of 256 possiblediscrete digital values between 0 and 255, inclusive. Here, the digital value of 0 corresponds to themost positive signal voltage, and the digital value of 255 corresponds to the most negative signalvoltage. The resulting digital data is then written into the memory.To retrieve the stored audio signal samples in sequence at the proper rate, the memory isaddressed by a counter which counts from 0 to 131,071 at an 8-kHz rate established by an externalclock. After counting to 131,071 the counter returns to 0, and the retrieval process repeats itself.As the memory address increments, the corresponding data appears at the memory output. Thisdata is converted back to an analog voltage in a piecewise constant manner by a digital-to-analogconverter.During the course of recording and playing back the analog audio signal, the signal is sampledClockCounter D/AConverterLow-PassFilterVolume ControlMemory HeadphoneFigure 1: block diagram of the audio playback sy stem.in time, quantized in amplitude, and reconstructed in a piecewise constant manner. As you willlearn in 6.003, this process introduces undesirable high-frequency components into the signal. Tominimize the perceived impact of these components, the signal is filtered by a low-pass filter after itis reconstructed by the digital-to-analog converter. Finally, the signal is fed into a volume controlstage which in turn drives a headphone.In the course of this homework assignment you will analyze and design four of the functionalblocks shown in Figure 1. These blocks are the clock, the digital-to-analog converter, the low-passfilter and the volume control. In Lab #4, you will construct these blocks and verify that theyperform as desired. Then, you will combine them with the counter, the read-only memory and thespeaker to construct and demonstrate the entire audio play-back system. Since you will constructthe system from the components in your 6.002 lab kit, your design of the blocks must account forthe fact that the available components are limited.Problem 1: The ClockThe circuit shown in Figure 2 is the system clock, which is a square-wave oscillator followed by aCMOS inverter; the inverter functions only as a buffer. The oscillator is constructed from anotherCMOS inverter, a resistor and a capacitor. Both inverters are powered between the positive supplyvoltage VSand ground, and both exhibit the hysteretic input-output characteristic defined in thefigure. The inverters are otherwise ideal.(A) Assume that vCAPhas just charged up to VHso that vOSChas just switched to 0 V. How muchtime elapses before vCAPdecays to VL, which in turn causes vOSCto switch to VS?(B) Assume that vCAPhas just decayed to VLso that that vOSChas just switched to VS. Howmuch time elapses before vCAPcharges up to VH, which in turn causes vOSCto switch to 0 V?(C) Determine the frequency of the oscillator in terms of R, C, VL, VHand VS.(D) Assume that VL= 1.8 V, VH= 3.0 V and VS= 5.0 V. Choose values for R and C so that theoscillator oscillates at or very near 8-kHz. Since oscillator frequency alone under specifies RRC+vCLKvCAPvOSC+-+--INOUTvOUTvINVSVHVLVSFigure 2: the system clock.and C, there is no single c orrec t choice. Therefore, choose values for R and C that are easilyimplemented with the components in the 6.002 lab kit.(E) For the choice of R and C from Part (D), sketch and clearly label a single graph that displaysvCAP, vOSCand vCLKas a function of time over one period of oscillation.Problem 2: The Digital-To-Analog ConverterThe circuit shown i n Figure 3 is the digital-to-analog converter. The voltage sources vDB0throughvDB7represent the voltages supplied by the eight data bits of the digital memory, DB0 throughDB7. These voltages will be approximately 5 V when the corresponding data bit is a logical high,and approximately 0 V when the corresponding data bit is a logical low. The voltage vOFF, whichis set by a potentiometer, is an offset voltage that is used to center the output of the converteraround 0 V. Assume that the op-amp in the converter is ideal.(A) Determine vDACas a function of vDB0through vDB7, and vOFF.(B) With vOFF= 0 V, the output of the digital-to-analog converter should span the range of 0 Vto −2.5 V. Thus, the output of the converter should be given byvDAC= −2.5 V7Xi=02i255DBiwhere each data bit DBi takes on the numerical value of 1 when high and 0 when low. In thismanner, each successive data bit from DB0 to DB7 is given a voltage weighting twice that ofthe preceding data bit, making it possible for the converter to output voltages from 0 V to−2.5 V in steps of −2.5/255 V. Give n this, determine R2in terms of R1.The voltage rating of the headphone is approximately ±1.25 V. Since the low-pass filter andbuffer between the converter and the speaker both have unity voltage gain over the frequencyR1+vDACvOFF+--2R1+-+-+-+-+-R1R12R12R12R12R12R1vDB1vDB0vDB6vDB7R2+5VFigure 3: the digital-to-analog converter.range of interest, the output range of the analog-to-digital converter must be designed to matchthe headphone rating. This is why the range is chosen to be 0 V to -2.5 V, with vOFF= 0.Note further that the output range of the converter is negative. This is because the converteris based upon the inve rting amplifier configuration.(C) The role of vOFFis to offset the output of the digital-to-analog
View Full Document
Unlocking...