Massachusetts Institute of TechnologyDepartment of Electrical Engineering and Computer Science6.002 – Circuits & ElectronicsSpring 2005Problem Set #4Issued 2/23/05 – Due 3/2/05Exercise 4.1: Consider the logic circuit that implements OUT = IN1 · (IN2 + IN3). ExpressOUT as a function of IN1, IN2 and IN3 in the form of a truth table. Also, implement this logiccircuit using logic symbols, and using a small number of n-channel MOSFETs and pull-up resistors.Exercise 4.2: In the circuit shown below, an inverter is loaded with a resistor. For this circuit,determine vOUTas a function of vIN. Also, graph and clearly label this input-output relation. Todo so, model the MOSFET as a switch having a threshold voltage of 1 V and an on-state resistanceof 1 kΩ.2 V10 kΩ+vOUT−90 kΩvINProblem 4.1: Following the node metho d, develop a set of simultaneous equations for thenetwork shown below that can be solved to determine the unknown node voltages e1, e2and e3.Express the set of equations in the formGe1e2e3= Swhere G is a 3 × 3 matrix of conductance terms and S is a 3 × 1 vector of terms involving theindependent sources. You need not solve the set of equations for the node voltages.Note that e4is not included in the analysis because it is directly sourced by the dependent voltagesource from ground, and th e source voltage can be expressed in terms of the first three nodevoltages. I n this sense, it is treated like an independ ent voltage source. Nonetheless, state how e4can be determined from e1, e2and e3once the latter node voltages are determined.R5e1R3e2R1e4RiVR4Ie3G(e2− e1)R2iProblem 4.2: Determine the Thevenin equ ivalent of each network shown below. Note thatthese networks contain dependent sources.vR1R2+−+u−AuR3guRV+ u −+−Problem 4.3: This problem studies the two-stage n-channel MOSFET amplifier shown below.The two stages are built with identical MOSFETs and pull-up resistors. A s implified model for theMOSFET is also given below. The simplification is that the triode region of operation is compressedonto the curve iD= Kv2DS/2, which becomes a common curve of operation for vGS− VT> vDS.Hint a load-line analysis may help solve this problem.(A) Determine the range of vINover which MOSFET M1 operates in cutoff. Also, determine vMIDfor this operating range.(B) Assuming that MOSFET M1 operates in its saturation region, determine vMIDas a function ofvIN. Also, determine th e range of vMIDand the range of vINthat correspond to th e saturatedoperation of MOSFET M1.(C) For values of vINthat are above the range found in Part (B), MOSFET M1 operates in itstriode region, which in the model below is compressed onto the curve iD= Kv2DS/2. DeterminevMIDfor vINin this range of operation.(D) Using the results of Parts (A), (B) and (C), determine vOUTas a function of vMIDfor thecutoff, saturation and triod e regions of operation of MOSFET M2. For each region, state thecorresponding operating range of vMIDand vOUT.(E) Assu ming that both MOSFETs operate in their saturation regions, determine vOUTas a func-tion of vIN. Also, determine the range of vMIDand then the corresponding range of vINoverwhich both MOSFETs operate in their saturation regions.(F) Determine the small-signal gain of the amplifier as a function of the operating-point input VINassuming that th is operating point falls within the range found in Part (E). That is, determinedvOUT/dvINevaluated at VIN.(G) Let K = 0.02 A/V2, RD= 1 kΩ, VS= 10V and VT= 1 V. Plot vMIDas a function of vINfor 0 ≤ vIN≤ 3 V. On the same graph, plot vOUTas a function of vINover the same range ofvIN. Hint: this is particularly simple if you are familiar with MatLab on Athena. Observe thedifferences of the two plots.Save a copy of your solutions to help with Homework #5.vIN+vMID_RRVS+_vOUTiDvDSCutoffiD = 0 vGS - VT < 0}SaturationiD = K(vGS-VT)2/20<vGS-VT<vDSTriodeiD = KvDS2/2vGS -VT > vDSProblem 4.4: An NPN bipolar junction transistor (NPN BJT) is a three-terminal device. Itsterminals are referred to as the base, the collector and the emitter. The symbol for the NPN BJTis shown below, along with the voltage and current definitions for this BJT when it is viewed as atwo-port device. Here, the Base-Emitter port acts as a control port and the Collector-Emitter portacts as a power port, much like the Gate-Source and Drain-Source ports of an n-channel MOSFET ,respectively.Figures 1 and 2 below describe the greatly idealized behavior of an NPN BJT in terms of its portvariables. Figure 1 describes the behavior of the control port, and shows how iBis related to vBE.Figure 2 describes the behavior of the power port, and shows h ow iCis related to vCEfor variousvalues of iB. In general, for iB> 0 and vCE> 0, iC= βiBwhere β is a gain constant.This problem investigates the use of the NPN BJT described by Figures 1 and 2 to construct anamplifier. The amplifier is shown in Figure 3. Assume that VS> VD.(A) Determine iBas a function of vIN. Sketch and clearly label the result. Hint: a load-line analysismight provide useful insight given the nonlinear beh avior shown in Figure 1.(B) Determine vOUTas a function of iB; note that vOUT= vCEfor the amplifier shown in Figure 3.Sketch and clearly label the result. Hint: a load-line analysis might provide useful insight giventhe nonlinear behavior shown in Figure 2.(C) Combine the results of Parts (A) and (B) to determine vOUTas a function of vIN. Sketch andclearly label the result.BaseCollectorEmitterSymbol+_vBE+_vCEiBiCTwo-Port DefinitionsVDiBvBEFigure 1iCvCEiB = 0iB = i1iB = i2iB = i3βi3βi2βi1Figure 2VSvIN+_vOUTRBRCFigure
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