Massachusetts Institute of TechnologyDepartment of Electrical Engineering and Computer Science6.002 – Circuits & ElectronicsSpring 2004Problem Set #7Issued 3/17/04 – Due 3/31/04Exercise 7.1: Each network shown below has a non-zero initial state at t = 0, as indicated.Find the network states for t ≥ 0. Hint: what equivalent resistance is in parallel with each capacitoror inductor, and what decay time results from this combination?R1R2C+_v(t)v(0) = VR1R2v(0) = V+_v(t)CR1R2Li(t)i(0) = IR1R2Li(t)i(0) = IExercise 7.2: The network shown below contains a voltage source having amplitude V, aswitch, a 1-kΩ resistor and a capacitor having capacitance C all in series. At t = 0 the switchcloses, after which the capacitor voltage vCis measured as shown below. From the measuredvoltage, determine V , C and the capacitor voltage before the switch closed. Note: the last pageof this problem set contains a larger graph of the capacitor voltage. It can be turned in with yourproblem set solutions.C+_v(t)V1kΩ0 1 2 3 4 5 6 7 8 9 10012345678910Time [ms]Capacitor Voltage [V]Capacitor VoltageExercise 7.3: The network shown below has two ports, two resistors and one inductor. Theresistor values R1and R2, and the inductor value L, are all unknown. Also shown below is theresult of an experiment performed on the network in which one port is driven with the voltage stepvINat t = 0, and the other port is loaded with a 1-kΩ resistor. Using result of the experiment,namely the measured current iIN, find the values R1, R2and L. Also, find the voltage vOUTacrossthe load resistor for t ≥ 0. Assume that the network inductor carries no current prior to t =0.R1R2LNetwork1kΩ_vOUT(t)t4V 4mAiIN(t)iIN(t)t1mAiIN(t) = 4mA - 3mAe -t/1µsvIN(t)vIN(t)+Problem 7.1: This problem examines the relation between transient responses of linearsystems. The network shown below is first driven by a current step at t =0,thendrivenbyacurrent ramp at t = 0, and finally driven by the current step plus the current ramp at t =0. Inthe first two cases, the inductor has zero initial current, as indicated.(A) Find the inductor current i(t) in response to the current step shown below. Assume thati(0) = 0.(B) Find the inductor current i(t) in response to the current ramp shown below. Again assumethat i(0) = 0.(C) The step input can be constructed from the ramp input according to IStep(t)=1αddtIRamp(t).Show that their respective responses are related in a similar manner.(D) Would the result from Part C hold if i(0) = 0? Why or why not?(E) Finally, find the inductor current i(t) in response to the current step plus the current ramp, thatis to I(t)=I◦(1 + αt)fort ≥ 0. This time assume that i(0) = i◦. Hint: think superposition.Problem 7.2: The circuit shown below can be used to regulate the current through an inductor.Typical applications include the regulation of currents in motors, solenoids and loud speakers, allI(t) =StepIOtI(t) =RampIOαttI(t)RLi(t)i(0)=0of which have inductive windings. We will analyze the circuit assuming that it operates in a cyclicmanner with switching period T . During the first part of each period, which lasts for a durationDT, switches S1 and S4 are on while switches S2 and S3 are off. During the second part of eachswitching period, which lasts for a duration (1 − D)T , switches S1 and S4 are off while switches S2and S3 are on. Note that 0 ≤ D ≤ 1.(A) Assume that D is constant and that the circuit has been operating long enough to reach acyclic steady state by t = 0, at which point a new switching period begins. In terms of theunknown i(0), determine i(t) for 0 ≤ t ≤ T .(B) Use your result from Part (A), and the fact that the circuit operates in a cyclic steady stateto determine i(0). Note that with this result, and that from Part (A), i(t) is completelydetermined.(C) Find the average value of i(t) over the period 0 ≤ t ≤ T . Hint: is it necessary to average theresult from Part A, or is there a faster method to find the average?(D) Suppose that the circuit has been operating with D ≡ D1for a time long enough to reach acyclic steady state by t = 0. Suppose that D switches to D = D2at t = 0, just as a newswitching period begins. In this case, determine i(t)fort ≥ 0. Hint: can you use your resultfrom Parts (A) and (B) as a particular solution over the interval 0 ≤ t?VSRLS1S3S2S4i(t)Problem 7.3: Consider the digital logic circuit shown below. Model each MOSFET with theswitch-resistor model, and let the on-state resistance RONsatisfy RON RPU. Further assumethat MOSFET M4 has a gate-to-source capacitance CGS. Given that the inputs IN1, IN2 and IN3cycle through the combinations 000, 001, 010, 011, 100, 101, 110, 111, determine the average powerdissipated by the logic circuit. Assume that each input combination is held for the period T withT RPUCGS. Make appropriate simplifications based on the inequalities for RONand T .VSRPURPUIN1IN2IN3OUTM1M2M3M4Problem 7.4: The network shown below contains a 1-µF capacitor and a 1-mH inductor. Att = 0, the capacitor voltage vCis 10 V, and the inductor current iLis 200 mA.(A) Over what period do the network states oscillate?(B) What is the maximum value that vCwill reach?(C) What is the maximum value that iLwill reach?(D) At what time after t = 0 will vCfirst reach its maximum positive value?(E) At what time after t = 0 will iLfirst reach its maximum positive value?1µF1mHiL+_vC0 1 2 3 4 5 6 7 8 9 10012345678910Time [ms]Capacitor Voltage [V]Capacitor
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