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MIT 6 002 - Study Guide

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6 002 Circuits and Systems Final Review Jason Kim Page 1 6 002 Circuits and Systems Outline of Topics Resistor Networks concepts 1st Order Circuits concepts 2nd Order Circuits concepts Node Method KCL KVL Superposition Thevenin and Norton equivalent circuit models Multiport Networks Transformers Power Consituitive Laws RC netwroks RL networks Homogenous and Particular solution Time constant response to an impulse power Low High Band Notch pass filters sinusodial steady state transients Impedance Model Bode Plots Magnitude and Phase LC networks LRC networks damping coefficient natural frequency o Underdamped Critical Overdamped Systems Resonance Q factor Half power point Sinusodial steady state transients Power real reactive Impedance Model ELI ICE Bode Plots Magnitude and Phase Digital Abstraction concepts Boolean Logic truth table formula gates and transistor level primitive laws DeMorgan s Law formula and gate equivalent MSP minumum sum of products MPS minimum product of sums MOSFET Transistors concepts Large Signal Model S SR SCS SVR Small Signal Model Saturation Linear Region Ron Loadline Operating Point Input Output Resistence Current Gain Power Gain Noise Margin Op Amp Circuits concepts Single Multiple input op amp circuits differentiator integrator adder subtractor opamp with R L C negative feedback positive feedback Bode Plots Magnitude and Phase Input Output resistence Schmitt Trigger Hysteresis Cascaded stages Diodes concepts i v characteristics model diode w R L C and op amp Peak detection Clipper circuits Incremental Analysis Page 0 1 Primitive Elements Resistor time domain V IR freq domain Z R Series R 1 R 2 1 2 Parallel R 1 R 2 R R R1 R2 R1 Vi Ii Vo R2 R2 V o V i R1 R2 Voltage Divider I2 Vi R1 R2 R1 I 2 I i R1 R2 Current Divider Resistor Network N unknowns N equations most primitive approach Node Analysis KCL KVL KCL Sum of all currents entering and leaving a node is zero KVL Sum of all voltages around a closed loop path is zero be careful with polarities 1 LABEL all current directions and voltage polarities Remember currents flow from to 2 write KCL KVL Equation 3 substitute and solve Simplification by inspection Thevenin Equivalent Circuit Model Norton Equivalent Circuit Model Rth Vth Voc Vth same i v characteristics at the ports IN RN Isc IN Three variables Vth Voc Rth RN and IN Isc They are related by Voc Isc Rth Vth Voc Leave the port open thus no current flow at the port and solve for Voc For a resistive network this gives you a point on the V axis of the i v plot IN Isc Short the port thus no voltage across the port and solve for Isc flowing out of and into For a resistive network this gives you a point on the I axis of the i v plot Rth Set all sources to zero except dependent sources Solve the resistive network When setting sources to zero V source becomes short and I source becomes open Rth may also be found by attaching Itest and Vtest and setting Rth Vtest Itest If dependent sources are present set only the independent sources to zero and attach Itest and Vtest Use KCL and KVL to find the expression Vtest Itest Rth Itest Original Circuit N Vtest note the direction of Itest and polarity of Vtest V test R th I test For both Thevenin Norton E C M s they have the same power consumption at the port as the original circuit but not for its individual components Power dissipated at Rth does not equal power dissipated at the resistors of the original circuit Same holds for the power delivered by the sources in the Thevenin model and the original circuit Thevenin and Norton E C M s are for terminal i v characteristics only Power Real Power IV I2R V2 R energy dissipated as heat T 1 Power I t V t dt T 0 Page 1 Superposition In a linear network with a number of independent sources the response can be found by summing the response to each independent sources acting alone with all other independent sources set to zero VR when only V1 is on Linear Network with n sources VR VR VR R 1 V2 n 0 VR 2 V 1 V 3 n 0 VR n V1 n 1 0 1 Leave one source on and turn off all other sources Voltage source off short Current source off open 2 Find the effect from the on source 3 Repeat for each sources 4 Sum the effect from each sources to obtain the total effect For cases where a linear dependent source is present along with multiple independent sources DO NOT turn off the dependent source Leave the dependent source on and carry it in your expressions Tackle the dependent source term last by solving linear equations Remember that the variable which the dependent source is depended on is affected by the individual independent sources that you are turning on and off Multiport Network i1 V1 V 2 M M R11 i1 i2 R12i2 V1 R22 i2 R21i1 V2 z parameter model By attaching V1 I1 and V2 I2 at the ports V 1 R 11 I 1 R 12 I 2 V 2 R 21 I 1 R 22 I 2 The first subscript denote the place port of voltage measurement The second subscript denote the place port of current source Thus R12 means the resistance V1 I2 when voltage V1 is measured at open port 1 and I2 current source is placed at port 2 If all the Z parameters Rxx s are identical then the networks can t be differentiated using only the i v characteristics at the ports Reciprocity R12 R21 Using the definitions from above R11 R12 i1 M R22 R21 V1 i2 V2 R12 R21 M i1 G11 G12 V1 G12 G21 Page 2 G22 G21 V T model i2 model Transformer i1 N1 N2 i2 V2 V1 V V 1 2N1 N2 N N2 N 1 i 1 N 2 i 2 Turns Ratio 1 Reflected Resistance the equiv resistance seen at port 1 of the resistance on the other side port2 i1 N1 N2 i2 V1 R V2 2 N1 R N2 V1 Reflected Resistance i1 Transformer vs Voltage Divider Voltage divider uses a series of resistors to divide and obtain a scaled down voltage In doing so power is dissipated not only at the load but also in the series resistors as well resulting in unwanted power dissipation On the other hand a transformer converts its voltage through magnetic coupling and power is dissipated only in the load Thus no unwanted power dissipation assuming ideal transformers Capacitor time domain I C dV dt 1 Cs 1 jwC freq domain Z High Frequency Short Low Frequency Open C C C1 C2 1 2 Series Parallel C 1 C 2 Vc 0 Vc 0 except when the input source is an impulse Vc t is continuous while Ic t may be discontinuous I C E Current I LEADS Voltage EMF by 90o Energy Conservation I dt Q CV 1 2 Energy Stored E CV no energy dissipation 2 R Note Two identical capacitors C1 and …


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MIT 6 002 - Study Guide

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