CSE 141L: Design your own processorWhat you’ll do:- learn Xilinx toolflow- learn Verilog language- propose new ISA- implement it- optimize it (for FPGA)- compete with other teamsGrading15% lab participation – webboard85% various parts of the labsCSE 141L: Design your own processorTeams- two people- pick someone with similar goals- you keep them to the end of the class- more on the class website:http://www.cse.ucsd.edu/classes/sp08/cse141L/Course Staff: 141LInstructor: Michael TaylorEmail: [email protected] Hours: EBU 3b 4110Tuesday 11:30-12:20TA: SaturninoEmail: [email protected] Hours: TBA(141 TA: Kwangyoon)Æ occasional cameos in 141Lhttp://www-cse.ucsd.edu/classes/sp08/cse141L/ebu 3b b260Class IntroductionsStand up & tell us:-Name- How long until graduation- What you want to do when you “hit the big time”- What kind of thing you find intellectually interestingWhat is an FPGA?Next time: (Tuesday)Sat will give a tutorial on VerilogtodayStart working on Xilinx assignment (due next Tuesday)- should be postedhttp://www.cse.ucsd.edu/classes/sp08/cse141L/Check the website regularly for updates:UCSD Department of Computer Science & Engineeringhttp://www.cse.ucsd.edu/classes/sp08/cse141/Professor: Michael TaylorRF0CSE 141: ComputerArchitectureComputer Architecture from 10,000 feetfoo(int x){ .. }Class of applicationPhysicsComputer Architecture from 10,000 feetfoo(int x){ .. }Class of applicationPhysicsAn impossiblylarge gap!In the olden days:“In 1942, just after the United States entered World War II, hundreds of women were employed around the country as computers...” (source: IEEE)The Great Battles in Computer ArchitectureAre About How to Refine the Abstraction Layersfoo(int x) { .. }ComputationLanguage Compiler ISAMicro ArchitectureRegister-Transfer LevelCircuitsDevicesMaterials SciencePhysicsIBM 360, VLIWRISC, T’metaFortranMead & ConwaySuperscalar, cachesLanguage Compiler ISAMicro ArchitectureRegister-Transfer LevelCircuitsDevicesMaterials ScienceAbstractions protect us from change-- but must also change as the world changesMore Power/cm^2!Denser VLSI gates!More pins!Slower Wires! Changes in fabrication capabilitiesComputationAbstraction Layers – reflected in organization of research communities ComputationLanguage Compiler ISAMicro ArchitectureReg-Transfer LevelCircuitsDevicesMaterials SciencePhysicsInternational Symposiumon Computer Architecture (ISCA)High Performance Computer Architecture (HPCA)Architectural Support for Programming Languages and OS(ASPLOS)International Symposium on Microarchitecture (MICRO)Design Automation Conference (DAC)Int. Conf. Computer Aided Design (ICCAD)International Solid State Circuit Conference (ISSCC)International Electron Devices Meeting (IEDM)Classic ISSCC (Circuits) Paper: “How we designed a chipand how fast / low power it is.”Classic Int. Electron Device Meeting (IEDM) Paper: How we designed a single transistorClassic Int. Electron Device Meeting (IEDM) Paper: “How we designed a wire”The focus of this classLanguage Compiler ISAMicro ArchitectureReg-Transfer LevelCircuitsDevicesMaterials ScienceInternational Symposiumon Computer Architecture (ISCA)High Performance Computer Architecture (HPCA)Architectural Support for Programming Languages and OS(ASPLOS)International Symposium on Microarchitecture (MICRO)Design Automation Conference (DAC)Int. Conf. Computer Aided Design (ICCAD)International Solid State Circuit Conference (ISSCC)International Electron Devices Meeting (IEDM)Tech Trends Language Compiler ISAMicro ArchitectureRTLCircuitsDevicesMaterials ScienceChanges in fabrication capabilitiesComputationSince technologychange is such abig influence in architecture,and because it takes 3-6 yearsto create a totally new design, we try to predict & exploit it (with varying degrees of success.)Moore’s Law: 2X transistors / “year”“Cramming More Components onto Integrated Circuits”– Gordon Moore, Electronics, 1965# on transistors / cost-effective integrated circuit double every N months (12 ≤N ≤ 24)Adapted from Patterson, CSE 252 Sp06 Lecture 2 © 2006 UC Berkeley.One Important Change: PowerSanta Clara, we have a problemMore pipeline stages,less efficient, more power.Just can’t remove> 100 wattswithout great expense ona desktop.Allcomputing is now Low Power Computing!Watts/cm211010010001.5μ 1μ 0.7μ 0.5μ 0.35μ 0.25μ 0.18μ 0.13μ 0.1μ 0.07μi386i386i486i486PentiumPentium®®PentiumPentium®®ProProPentiumPentium®®IIIIPentiumPentium®®IIIIIIHot plateHot plateRocketNozzleRocketRocketNozzleNozzleNuclear ReactorNuclear ReactorNuclear ReactorFrom From ““New Microarchitecture Challenges in the Coming Generations of CMNew Microarchitecture Challenges in the Coming Generations of CMOS Process OS Process TechnologiesTechnologies””––Fred Pollack, Intel Corp. Micro32 conference key note Fred Pollack, Intel Corp. Micro32 conference key note --1999. 1999. PentiumPentium®®44Power DensityPower doubles every 4 yearsPower doubles every 4 years55--year projection: 200W total, 125 W/cmyear projection: 200W total, 125 W/cm2 2 !!P=VI: 75W @ 1.5V = 50 A!P=VI: 75W @ 1.5V = 50 A!101001000100001993199419951996199719981999200020012002200320042005Intel x867 yr / 10x (39%)5 yr / 10x (58%)20 yr / 10x (12%)Change: microprocessor frequency versus time3800 Power LimitedFaster Circuits,Faster + Smaller Transistors,Fast MicroarchitectureIntelP3: 12 stagesP4 (b4 paper): 20 stagesP4/prescott: 31 stagesP5/Tejas: >> 31 stagesIntelP3: 12 stagesP4 (b4 paper): 20 stagesP4/prescott: 31 stagesP5/Tejas: >> 31 stagesIntelP3: 12 stagesP4 (b4 paper): 20 stagesP4/prescott: 31 stagesP5/Tejas: >> 31 stagesBack to the futureP3:12 stagesP4 (b4 paper):20 stagesP4/prescott:31 stagesP5/Tejas:>> 31 stagesSame as 1996 – I can’t sell that. I must call it something new ---Pentium...Mmmm... Great Scott,I’ve got it!And forward to multi-coreIntel Core DuoFuture outlookOld Trend: Frequency New Trend: Parallel processingÆ Intel is pushing multi-core instead of higher clocks(will we ever hit 10 GHz?)Æ good time to know something about architectureÆ your application may be feasible only if you canuse the architecture efficientlyLanguage Compiler ISAMicro ArchitectureRegister-Transfer LevelCircuitsDevicesMaterials ScienceAbstractions protect us from change-- but must also change as the world changesTelepathicPhotographic memoryVirtual Homicide (Quake) Changes in application spacePhysicsMathematical GeniusEtc…And on that note: