CSE 141L Project Computer architecture Professor Pramod Argade Fall 2005 Logic work Tutorial II 1 PROM RAM Building a PROM Building a RAM 2 Registers and Clock Presented by Raid Ayoub Steps for building a PROM Step 1 Click on the button 1 Steps for building a PROM Step 2 Select PROM for I MEM Click here Steps for building a PROM Step 3 Select Address and data size For the project select 8 for both 2 Steps for building a PROM Step 4 Chose a method for entering and storing data Preferred options Enter hex data manually Read data from a raw hex file Steps for building a PROM Example Enter hex data manually Program instructions 3 Simple test circuit for PROM Verifying stored data I MEM 0 4 8 C 0 4 8 C 1 5 9 D 1 5 9 D 2 6 A E 2 6 A E 3 7 B F 3 7 B F Address 01 In7 In6 In5 In4 In3 In2 In1 In0 Out7 Out6 Out5 Out4 Out3 Out2 Out1 Out0 0 0 Stored data 00 Steps for building a RAM Step 1 Click on the button 4 Steps for building a RAM Step 2 Select RAM for D MEM Steps for building a RAM Step 3 Select Address size data size and Chip enable For the project select 8 for both address and data Select the number of Chip Enables you need in your design 5 Steps for building a RAM Step 4 Save the RAM setting then click Finish Editing stored data through RAM wizard Step A Click on RAM Step B Simulation ROM RAM PLA Wizard D MEM 1 0 0 4 8 C 0 4 8 C 1 5 9 D 1 5 9 D 2 6 A E 2 6 A E 1 0 3 7 B F 3 7 B F 0 4 8 C 0 4 8 C 1 5 9 D 1 5 9 D 2 6 A E 2 6 A E 3 7 B F 3 7 B F CE0 WE DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 A7 A6 A5 A4 A3 A2 A1 A0 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 0 0 6 Editing stored data through RAM wizard Step C Click on Edit selected device Editing stored data through RAM wizard Step D Select data entry method 7 Editing stored data through RAM wizard Example Enter hex data manually input data D MEM has an updated data now D MEM 1 0 0 4 8 C 0 4 8 C 1 5 9 D 1 5 9 D 2 6 A E 2 6 A E 1 0 3 7 B F 3 7 B F 0 4 8 C 0 4 8 C 1 5 9 D 1 5 9 D 2 6 A E 2 6 A E 3 7 B F 3 7 B F CE0 WE DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 A7 A6 A5 A4 A3 A2 A1 A0 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 0 0 8 Registers and Clock Register of 8 bits 8 D Flip Flops Clock is used for triggering the register Clock DEV1 0 4 8 C 0 4 8 C 1 5 9 D 1 5 9 D 2 6 A E 2 6 A E CLK D7 Q7 D6 Q6 D5 Q5 D4 Q4 D3 Q3 D2 Q2 D1 Q1 D0 Q0 CLR 3 7 B F 3 7 B F D 6 1 0 Registers and Clock Register of 8 bits 8 D Flip Flops Clock is used for triggering the register Clock DEV1 To adjust clock timing Right click on clock and Select attribute 0 4 8 C 0 4 8 C 1 5 9 D 1 5 9 D 2 6 A E 2 6 A E CLK D7 Q7 D6 Q6 D5 Q5 D4 Q4 D3 Q3 D2 Q2 D1 Q1 D0 Q0 CLR 3 7 B F 3 7 B F D 6 1 0 9 Adjust clock timing Questions 10
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