CS231: Computer Architecture IAnnouncementsDecodersWhat a decoder doesEnable inputsBlocks and abstractionA 3-to-8 decoderSo what good is a decoder?Decoder ExamplesSlide 10Slide 11MultiplexersA 4-to-1 multiplexerImplementing functions with multiplexersA more efficient wayMux ExampleSlide 17Slide 18Slide 19Slide 20Slide 21CS231: Computer Architecture IFriday, February 15, 2008CS 231 - Computer Architecture I2Announcements•Homework 3 is due Monday @ 5:00pm–Turn in to TA Office 0212 SC (In Basement)–Slide it under the door! NOT Outside in bins!!!–Late homeworks accepted with penalty•By Tuesday @ 5:00pm: -10%•By Wednesday @ 5:00pm: -20%•No homework accepted after this. Solutions will be posted.–Use Newsgroup and Office Hours for help with assignments–Contains 1 LogicWorks problemDecodersCS 231 - Computer Architecture I4What a decoder does•A n-to-2n decoder takes an n-bit input and produces 2n outputs. The n inputs represent a binary number that determines which of the 2n outputs is uniquely true.•A 2-to-4 decoder operates according to the following truth table.–The 2-bit input is called S1S0, and the four outputs are Q0-Q3.–If the input is the binary number i, then output Qi is uniquely true.•For instance, if the input S1 S0 = 10 (decimal 2), then output Q2 is true, and Q0, Q1, Q3 are all false.•This circuit “decodes” a binary number into a “one-of-four” code.S1 S0 Q0 Q1 Q2 Q30 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1CS 231 - Computer Architecture I5Enable inputs•Many devices have an additional enable input, which is used to “activate” or “deactivate” the device.•For a decoder,–EN=1 activates the decoder, so it behaves as specified earlier. Exactly one of the outputs will be 1.–EN=0 “deactivates” the decoder. By convention, that means all of the decoder’s outputs are 0.•We can include this additional input in the decoder’s truth table:EN S1 S0 Q0 Q1 Q2 Q30 0 0 0 0 0 00 0 1 0 0 0 00 1 0 0 0 0 00 1 1 0 0 0 01 0 0 1 0 0 01 0 1 0 1 0 01 1 0 0 0 1 01 1 1 0 0 0 1CS 231 - Computer Architecture I6•Decoders are common enough that we want to encapsulate them and treat them as an individual entity. •Block diagrams for 2-to-4 decoders are shown here. The names of the inputs and outputs, not their order, is what matters.•A decoder block provides abstraction:–You can use the decoder as long as you know its truth table or equations, without knowing exactly what’s inside.–It makes diagrams simpler by hiding the internal circuitry.–It simplifies hardware reuse. You don’t have to keep rebuilding the decoder from scratch every time you need it.•These blocks are like functions in programming!Blocks and abstractionQ0 = S1’ S0’Q1 = S1’ S0Q2 = S1 S0’Q3 = S1 S0CS 231 - Computer Architecture I7A 3-to-8 decoder•Larger decoders are similar. Here is a 3-to-8 decoder.–The block symbol is on the right.–A truth table (without EN) is below.–Output equations are at the bottom right.•Again, only one output is true for any input combination.S2 S1 S0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q70 0 0 1 0 0 0 0 0 0 00 0 1 0 1 0 0 0 0 0 00 1 0 0 0 1 0 0 0 0 00 1 1 0 0 0 1 0 0 0 01 0 0 0 0 0 0 1 0 0 01 0 1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 01 1 1 0 0 0 0 0 0 0 1Q0 = S2’ S1’ S0’Q1 = S2’ S1’ S0Q2 = S2’ S1 S0’Q3 = S2’ S1 S0Q4 = S2 S1’ S0’Q5 = S2 S1’ S0Q6 = S2 S1 S0’Q7 = S2 S1 S0CS 231 - Computer Architecture I8So what good is a decoder?•Do the truth table and equations look familiar?•Decoders are sometimes called minterm generators.–For each of the input combinations, exactly one output is true.–Each output equation contains all of the input variables.–These properties hold for all sizes of decoders.•This means that you can implement arbitrary functions with decoders. If you have a sum of minterms equation for a function, you can easily use a decoder (a minterm generator) to implement that function.S1 S0 Q0 Q1 Q2 Q30 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1Q0 = S1’ S0’Q1 = S1’ S0Q2 = S1 S0’Q3 = S1 S0CS 231 - Computer Architecture I9Decoder Examples•Implement F(x,y,z) = ∑m(1,3,4,7) using a decoder.9CS 231 - Computer Architecture I10Decoder Examples•Implement F(x,y,z) = ∑m(1,3,4,7) using a decoder.10CS 231 - Computer Architecture I11Decoder Examples•Implement F(x,y,z) = ∑m(1,3,4,7) using a decoder.11MultiplexersCS 231 - Computer Architecture I1313A 4-to-1 multiplexer•Here is a block diagram and abbreviated truth table for a 4-to-1 mux.•Be careful! In LogicWorks the multiplexer has an active-low EN input signal. When EN’ = 1, the mux always outputs 1.EN’ S1 S0 Q0 0 0 D00 0 1 D10 1 0 D20 1 1 D31 x x 1Q = S1’ S0’ D0 + S1’ S0 D1 + S1 S0’ D2 + S1 S0 D3CS 231 - Computer Architecture I1414Implementing functions with multiplexers•Muxes can be used to implement arbitrary functions.•One way to implement a function of n variables is to use an n-to-1 mux:–For each minterm mi of the function, connect 1 to mux data input Di. Each data input corresponds to one row of the truth table.–Connect the function’s input variables to the mux select inputs. These are used to indicate a particular input combination.•For example, let’s look at f(x,y,z) = m(1,2,6,7).x y z f0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 01 0 1 01 1 0 11 1 1 1CS 231 - Computer Architecture I1515A more efficient way•We can actually implement f(x,y,z) = m(1,2,6,7) with just a 4-to-1 mux, instead of an 8-to-1.•Step 1: Find the truth table for the function, and group the rows into pairs. Within each pair of rows, x and y are the same, so f is a function of z only.–When xy=00, f=z–When xy=01, f=z’–When xy=10, f=0–When xy=11, f=1•Step 2: Connect the first two input variables of the truth table (here, x and y) to the select bits S1 S0 of the 4-to-1 mux.•Step 3: Connect the equations above for f(z) to the data inputs D0-D3.x y z f0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 01 0 1 01 1 0 11 1 1 1CS 231 - Computer Architecture I16Mux Example•Implement F(x,y,z) = ∑m(2,3,4,7) using a multiplexer.16CS 231 - Computer Architecture I17Mux Example•Implement F(x,y,z) = ∑m(2,3,4,7) using a multiplexer.17 x y z f 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1CS 231 - Computer Architecture I18Mux Example•Implement F(x,y,z) = ∑m(2,3,4,7) using a multiplexer.18 x y z f 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1CS 231 -
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