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U of I CS 231 - Lecture notes

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Other ISA's 1Other ISAs• Next, we discuss some alternative instruction set designs.– Different ways of specifying memory addresses– Different numbers and types of operands in ALU instructions• End with fractional representations– Fixed-point – Floating-pointOther ISA's 2Addressing modes• The first instruction set design issue we’ll see are addressing modes, which let you specify memory addresses in various ways.– Each mode has its own assembly language notation.– Different modes may be useful in different situations.– The location that is actually used is called the effective address.• The addressing modes that are available will depend on the datapath.– Our simple datapath only supports two forms of addressing.– Older processors like the 8086 have zillions of addressing modes.• We’ll introduce some of the more common ones.Other ISA's 3Immediate addressing• One of the simplest modes is immediate addressing, where the operand itself is accessed.LD R1, #1999 R1 ←←←← 1999• This mode is a good way to specify initial values for registers.• We’ve already used immediate addressing several times.Other ISA's 4Direct addressing• Another possible mode is direct addressing, where the operand is a constant that represents a memory address.LD R1, 500 R1 ←←←← M[500]• Here the effective address is 500, the same as the operand.• This is useful for working with pointers.– You can think of the constant as a pointer.– The register gets loaded with the data at that address.Other ISA's 5Register indirect addressing• We already saw register indirect mode, where the operand is a register that contains a memory address.LD R1, (R0) R1 ←←←← M[R0]• The effective address would be the value in R0.• This is also useful for working with pointers. In the example above,– R0 is a pointer, and R1 is loaded with the data at that address.– This is similar to R1 = *R0 in C or C++.• So what’s the difference between direct mode and this one?– In direct mode, the address is a constantthat is hard-coded into the program and cannot be changed.– Here the contents of R0, and hence the address being accessed, can easily be changed.Other ISA's 6• Register indirect mode makes it easy to access contiguous locations in memory, such as elements of an array.• If R0 is the address of the first element in an array, we can easily access the second element too:LD R1, (R0) // R1 contains the first elementADD R0, R0, #1LD R2, (R0) // R2 contains the second element• This is so common that some instruction sets can automatically increment the register for you:LD R1, (R0)+ // R1 contains the first elementLD R2, (R0)+ // R2 contains the second element• Such instructions can be used within loops to access an entire array.Stepping through arraysOther ISA's 7Indexed addressing• Operands with indexed addressing include a constant anda register.LD R1, 500(R0) R1 ←←←← M[R0 + 500]• The effective address is the register data plus the constant. For instance, if R0 = 25, the effective address here would be 525.• We can use this addressing mode to access arrays also.– The constant is the array address, while the register contains an index into the array.– The example instruction above might be used to load the 26th element of an array that starts at memory location 500.• It’s possible to use negative constants too, which would let you index arrays backwards.Other ISA's 8PC-relative addressing• We’ve seen PC-relative addressing already. The operand is a constant that is added to the program counter to produce the effective memory address.200: LD R1, $30 R1 ←←←← M[201 + 30]• The PC usually points to the address of the next instruction, so the effective address here is 231 (assuming the LD instruction itself uses one word of memory).• This is similar to indexed addressing, except the PC is used instead of a regular register.• Relative addressing is often used in jump and branch instructions.– For instance, JMP $30 lets you skip the next 30 instructions.– A negative constant lets you jump backwards, which is common in writing loops.Other ISA's 9Indirect addressing• The most complicated mode that we’ll look at is indirect addressing.LD R1, [360] R1 ←←←← M[M[360]]• The operand is a constant that specifies a memory location whichrefers to anotherlocation, whose contents are then accessed.• The effective address here is M[360].• Indirect addressing is useful for working with multi-level pointers, or “handles.”– The constant represents a pointer to a pointer.– In C, we might write something like R1 = **ptr.Other ISA's 10Addressing mode summaryMode Notation Register transfer equivalentImmediateLD R1, #CONSTR1 ←←←← CONSTDirectLD R1, CONSTR1 ←←←← M[CONST]Register indirectLD R1, (R0)R1 ←←←← M[R0]IndexedLD R1, CONST(R0)R1 ←←←← M[R0 + CONST]RelativeLD R1, $CONSTR1 ←←←← M[PC + CONST]IndirectLD R1, [CONST]R1 ←←←← M[M[CONST]]Other ISA's 11Number of operands• Another way to classify instruction sets is according to the number of operands that each data manipulation instruction can have.• Our example instruction set had three-address instructions, because each one had up to three operands—two sources and one destination.• This provides the most flexibility, but it’s also possible to have fewer than three operands.ADD R0, R1, R2operationdestination sourcesoperandsR0 ←←←←R1 + R2Register transfer instruction:Other ISA's 12Two-address instructions• In a two-address instruction, the first operand serves as both the destination and one of the source registers.• Some other examples and the corresponding C code:ADD R3, #1 R3 ←←←← R3 + 1 R3++;MUL R1, #5 R1 ←←←← R1 * 5 R1 *= 5;NOT R1 R1 ←←←← R1’ R1 = ~R1;ADD R0, R1operationdestinationandsource 1source 2operandsR0 ←←←←R0 + R1Register transfer instruction:Other ISA's 13• Some computers, like this old Apple II, have one-address instructions.• The CPU has a special register called an accumulator, which implicitlyserves as the destination and one of the sources.• Here is an example sequence which increments M[R0]:LD (R0) ACC ←←←← M[R0]ADD #1 ACC ←←←← ACC + 1ST (R0) M[R0] ←←←← ACCOne-address instructionsADD R0operation sourceACC ←←←← ACC + R0Register transfer instruction:Other ISA's 14The ultimate: zero addresses• If


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U of I CS 231 - Lecture notes

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