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U of I CS 231 - Registers

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Registers 1Registers• Today we’ll see another common sequential device: registers.– They’re a good example of sequential analysis and design.– They are also frequently used in building larger sequential circuits.• Registers hold larger quantities of data than individual flip-flops.– Registers are central to the design of modern processors.– There are many different kinds of registers.– We’ll show some applications ofthese special registers.Registers 2What good are registers?• Flip-flops are limited because they can store only one bit.– We had to use two flip-flops for our two-bit counter examples.– Most computers work with integers and single-precision floating-point numbers that are 32-bits long.• A register is an extension of a flip-flop that can store multiple bits.• Registers are commonly used as temporary storage in a processor.– They are faster and more convenient than main memory.– More registers can help speed up complex calculations.• We’ll discuss RAM next time, and later we’ll also see how registers are used in designing and programming CPUs.Registers 3A basic register• Basic registers are easy to build. We can store multiple bits just by putting a bunch of flip-flops together!• A 4-bit register from LogicWorks, Reg-4, is on the right, and its internal implementation is below.– This register uses D flip-flops, so it’s easy to store data without worrying about flip-flop input equations.– All the flip-flops share a common CLK and CLR signal.Registers 4Adding a parallel load operation• The input D3-D0is copied to the output Q3-Q0on everyclock cycle.• How can we store the current value for more than one cycle?• Let’s add a load input signal LD to the register.– If LD = 0, the register keeps its current contents.– If LD = 1, the register stores a new value, taken from inputs D3-D0.LDQ(t+1)0 Q(t)1 D3-D0Registers 5Clock gating• We could implement the load ability by playing games with the CLK input, as shown below.– When LD = 0, the flip-flop C inputs are held at 1. There is no positive clock edge, so the flip-flops keep their current values.– When LD = 1, the CLK input passes through the OR gate, so the flip-flops can receive a positive clock edge and can load a new value from the D3-D0inputs.Registers 6Clock gating is bad• This is called clock gating, since gates are added to the clock signal.• There are timing problems similar to those of latches. Here, LD must be kept at 1 for the correct length of time (one clock cycle) and no longer.• The clock is delayed a little bit by the OR gate.– In more complex scenarios, different flip-flops in the system could receive the clock signal at slightly different times.– This “clock skew” can lead to synchronization problems.Registers 7A better parallel load• Another idea is to modify the flip-flop D inputs and not the clock signal.– When LD = 0, the flip-flop inputs are Q3-Q0, so each flip-flop just keeps its current value.– When LD = 1, the flip-flop inputs are D3-D0, and this new value is “loaded” into the register.Registers 8• A shift register “shifts” its output once every clock cycle.• SI is an input that supplies a new bit to shift “into” the register.• For example, if on some positive clock edge we have:SI = 1Q0-Q3= 0110then the next state will be:Q0-Q3= 1011• The current Q3(0 in this example) will be lost on the next cycle.Shift registersQ0(t+1) = SIQ1(t+1) = Q0(t)Q2(t+1) = Q1(t)Q3(t+1) = Q2(t)Registers 9Shift direction• The circuit and example make it look like the register shifts “right.”• But it really depends on your interpretation of the bits. If you consider Q3 to be the most significant bit instead, then the register is shifting in the oppositedirection!Q0(t+1) = SIQ1(t+1) = Q0(t)Q2(t+1) = Q1(t)Q3(t+1) = Q2(t)Present Q0-Q3SI Next Q0-Q3ABCD X XABCPresent Q3-Q0SINext Q3-Q0DCBA X CBAXRegisters 10Shift registers with parallel load• We can add a parallel load, just like we did for regular registers.– When LD = 0, the flip-flop inputs will be SIQ0Q1Q2, so the register shifts on the next positive clock edge.– When LD = 1, the flip-flop inputs are D0-D3, and a new value is loaded into the shift register, on the next positive clock edge.Registers 11Shift registers in LogicWorks• Here is a block symbol for the Shift Reg-4 from LogicWorks. The implementation is shown on the previous page, except the LD input here is active-low instead.Registers 12Other types of shift registers• Logical shifts – Standard shifts like we just saw. In the absence of a SI input, 0 occupies the vacant position.– Left: 0110 -> 1100– Right: 0110 -> 0011• Circular shifts (also called ring counters or rotates) – The shifted out bit wraps around to the vacant position.– Left: 1001 -> 0011– Right: 1001 -> 1100• Switch-tail ring counter (aka Johnson counter) – Similar to the ring counter, but the serial input is the complement of the serial output.– Left: 1001 -> 0010– Right: 1001 -> 0100• Arithmetical shifts – Left shifting is the same as a logical shift. Right shifting however maintains the MSB.– Left: 0110 -> 1100– Right: 0110 -> 0011; 1011 -> 1101Registers 13Serial data transfer• One application of shift registers is converting between “serial data”and “parallel data.”• Computers typically work with multiple-bit quantities.– ASCII text characters are 8 bits long.– Integers, single-precision floating-point numbers, and screen pixels are up to 32 bits long.• But sometimes it’s necessary to send or receive data serially, or one bit at a time. Some examples include:– Input devices such as keyboards and mice.– Output devices like printers.– Any serial port, USB or Firewire device transfers data serially.– Recent switch from Parallel ATA to Serial ATA in hard drives.Registers 14Receiving serial data• To receiveserial data using a shift register:– The serial device is connected to the register’s SI input.– The shift register outputs Q3-Q0 are connected to the computer.• The serial device transmits one bit of data per clock cycle.– These bits go into the SI input of the shift register.– After four clock cycles, the shift register will hold a four-bit word.• The computer then reads all four bits at once from the Q3-Q0 outputs.serial devicecomputerRegisters 15Sending data serially• To senddata serially with a shift register, you do the opposite:– The CPU is


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U of I CS 231 - Registers

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