CS231 (Fall 05)Review SessionXiao Ma ([email protected])Sep 23, 2005Who am I?CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Hey! My name is Xiao Ma, a new Ph.D. student in the department of Computer Science at UIUC. My research interests are system architecture and operating system. Now I’m a member of Opera group. Questions? Raise hand! Wrong saying? Point out!TA and StudentsCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) I hope I’m not a monster like this in your eyes. ☺TA and StudentsCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) We have the same goal.Outline DecodersCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Multiplexers Quizzes 6-7 MP ExampleDecoder - GeneralCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) A n-to-2ndecoder takes an n-bit input and produces 2noutputs. The n inputs represent a binary number that determines which of the 2noutputs is uniquely true.Decoder – What’s inside?CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Try to implement a 1-to-2 decoder. How about 2-4? 3-8? …Decoder – ExpansionCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) We can combine two same decoders by using EN inputs.A:B decoder * 2 = 2A:2B decoder ?A:B decoder * 2 = (A+1):2B decoderDecoder – Active-high vs Active-lowCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Active-high decoders generate minterms. Active-low decoders generate maxterms. Please refer to slides 17-23 in the lecture.Outline DecodersCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Multiplexers Quizzes 6-7 MP ExampleMultiplexer - GeneralCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) A 2n-to-1 multiplexer takes: n select lines 2ndata input lines makes: 1 outputMultiplexer – DecoderMultiplexerCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Can you use decoders and basic gates to make a multiplexer?Selector 1Selector 0Input 3Input 2Input 1Input 0OutputMultiplexer - Efficient implementationCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) We can actually implement a function with 3 variables with just one 22-to-1 mux, instead of an 23-to-1.n variables 2n-1-to-1 multiplexerMultiplexer - What’s inside?CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) How to use AND gates and OR gates to implement an 8-1 multiplexer. An NAND gates implementation of an 8-1 multiplexer.Outline DecodersCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Multiplexers Quizzes 6-7 MP ExampleQuiz – Quiz 6: Question 4CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) small decoders -> bigger decoerA X:Y decoder can be constructed using (how many? k) A:B decoders with enable.A single decoder of size (m:n) selects the appropriate one of these A:B decoders. k = Y / Bm:n = log2k : kAnswer:Quiz – Quiz 7: Question 2CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Write the expression for multiplexer(s) by truth tableTruth TableK-MapExpressionQuiz – Quiz 7: Question 2CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Write the expression for multiplexer(s) directly.h = z’y’ + zxf = (z’)’y + z’h= zy + z’(z’y’ + zx) = zy + z’y’g = y’h’ + yx’= y’(z’y’ + zx)’ + yx’= y’(z+y)(z’+x’) + yx’= y’zx’ + yx’ = x’y + x’zQuiz – Quiz 7: Question 3CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Use multiplexer in the efficient way without using invertors.What can you do to change the situation?Use other variables as the selectors.Quiz – Quiz 7: Question 4CS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) The same question as before!Outline DecodersCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Multiplexers Quizzes 6-7 MP ExampleMP Example - ProblemCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) The input to your circuit will be the low 4 bits of the ASCII value for the character being displayed. These values are shown as N3-N0 in the truth table below. Since you are only implementing letters A-J, you may assume that the remaining six 4-bit patterns will never be used, and so are don't care situations.010174J……010066B100065AN0N1N2N3ASCIICharacter InputMP Example - ProblemCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected]) Your circuit will produce seven outputs, one for each of the seven line segments. We'll name the outputs T, U, V, W, X, Y, Z, as illustrated right. OutputA B C D E F G H I JMP Example – Truth TableCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected])MP Example – K-MapsCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected])MP Example – K-Map SimplificationCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected])MP Example – K-Map SimplificationCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected])MP Example – Two Level ImplementationCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected])MP Example – NAND ImplementationCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected])MP Example – Decoder ImplementationCS231 Computer Architecture I (2005 Fall) Review Session (9/23/2005)Xiao Ma ([email protected])MP Example – Multiplexer
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