24 February 2000 1XtensaA new ISA and ApproachTensilica: www.tensilica.comTensilica: www.tensilica.comTensilica: www.tensilica.comTensilica: www.tensilica.comEarl Killian: www.killian.com/earlEarl Killian: www.killian.com/earlEarl Killian: www.killian.com/earlEarl Killian: www.killian.com/earl24 February 2000 2Presentation Goals How Tensilica and Xtensa came to beHow Tensilica and Xtensa came to beHow Tensilica and Xtensa came to beHow Tensilica and Xtensa came to be What Xtensa is, with motivation for the What Xtensa is, with motivation for the What Xtensa is, with motivation for the What Xtensa is, with motivation for the decisions we madedecisions we madedecisions we madedecisions we made• Historical approach Get you thinking about a new paradigmGet you thinking about a new paradigmGet you thinking about a new paradigmGet you thinking about a new paradigm• How do application-specific processors change the game? What are you interested in hearing about?What are you interested in hearing about?What are you interested in hearing about?What are you interested in hearing about?24 February 2000 3My Background Major ProjectsMajor ProjectsMajor ProjectsMajor Projects• 2 operating systems (not Unix)• 3 compilers (not gcc)• 1 satellite network• 4 processor instruction set designs• 6 processor micro-architectures PlacesPlacesPlacesPlaces• 1 University• 3 Start-ups (founder of one)• 1 Government lab• 2 Medium-sized companies24 February 2000 4Outline About TensilicaAbout TensilicaAbout TensilicaAbout Tensilica• History, getting started, etc. ApplicationApplicationApplicationApplication----Specific ProcessorsSpecific ProcessorsSpecific ProcessorsSpecific Processors•What’s different Xtensa ISAXtensa ISAXtensa ISAXtensa ISA• What we did and why Extensibility via the TIE (Tensilica Instruction Extensibility via the TIE (Tensilica Instruction Extensibility via the TIE (Tensilica Instruction Extensibility via the TIE (Tensilica Instruction Extension) LanguageExtension) LanguageExtension) LanguageExtension) Language24 February 2000 5Tensilica Background Tensilica is the brainchild of Chris RowenTensilica is the brainchild of Chris RowenTensilica is the brainchild of Chris RowenTensilica is the brainchild of Chris Rowen• founder and CEO• formerly Intel, Stanford, MIPS, sgi, and Synopsys• an idea that wouldn’t leave him alone: configurable processors1997 1998 1999 2000Founded Early Team Xtensa 1.0$20M C round$10.6M B roundXtensa 2.0$2.3M A roundideatry snpsexplorationopen officebuild teamplaninitial developmenttrial sellingfull selling2.0 developmentfirst customer3.0 developmenXtensa 1.524 February 2000 6Outline About TensilicaAbout TensilicaAbout TensilicaAbout Tensilica• History, getting started, etc. ApplicationApplicationApplicationApplication----Specific ProcessorsSpecific ProcessorsSpecific ProcessorsSpecific Processors•What’s different Xtensa ISAXtensa ISAXtensa ISAXtensa ISA• What we did and why Extensibility via the TIE (Tensilica Instruction Extensibility via the TIE (Tensilica Instruction Extensibility via the TIE (Tensilica Instruction Extensibility via the TIE (Tensilica Instruction Extension) LanguageExtension) LanguageExtension) LanguageExtension) Language24 February 2000 7Tensilica’s Mission From an early corporate overview:From an early corporate overview:From an early corporate overview:From an early corporate overview:To be the leading provider ofapplication-specific microprocessor solutionsby deliveringconfigurable, ASIC-based coresandmatching software development tools ThereforeThereforeThereforeTherefore• Synthesizable, configurable, embedded processors– Application is known at ASIC-design time!– Key is to exploit application specificity• Compiler and OS are as important as the processor• Customers are system designers– Very cost conscious customers — will only pay for what they need24 February 2000 8The OpportunityA choice between hardA choice between hardA choice between hardA choice between hard----wired, more optimized wired, more optimized wired, more optimized wired, more optimized and softer, more flexible and softer, more flexible and softer, more flexible and softer, more flexible implementationsimplementationsimplementationsimplementations• Intensive optimization is a bet on past knowledge, stable standards and predictable markets• Flexible design is a bet on future learning and unpredictable marketsSometimes, you can get Sometimes, you can get Sometimes, you can get Sometimes, you can get ~best of both~best of both~best of both~best of bothOptimality/integration(e.g. mW, $)Flexibility/modularity(e.g. time-to-market)specialhardwareFPGAstraditionalprocessors+ SW∆ >102∆>102configurableprocessors+ SW24 February 2000 9Not the Desktop ModelIntel Pentium III(~100mm2in 0.18µ)Typical Xtensa processor (~2mm2in 0.18µ)100x lower cost and power20x lowerparts count10x lower system priceonto system-on-a-chip ICinto handheld applianceprocessor ICinto PC boxonto system boardprocessor core24 February 2000 10Technology VisionSelect Select Select Select processor processor processor processor options and options and options and options and describe new describe new describe new describe new instructions in instructions in instructions in instructions in Web interfaceWeb interfaceWeb interfaceWeb interfaceUsing theUsing theUsing theUsing theXXXXtensa tensa tensa tensa processor processor processor processor generator, generator, generator, generator, create...create...create...create...ALUPipeI/OTimerMMURegister FileCacheTailored, Tailored, Tailored, Tailored, HDL uP HDL uP HDL uP HDL uP corecorecorecoreCustomized Customized Customized Customized Compiler, Compiler, Compiler, Compiler, Assembler, Assembler, Assembler, Assembler, Linker, Linker, Linker, Linker, Debugger,Debugger,Debugger,Debugger,SimulatorSimulatorSimulatorSimulatorUse Use Use Use standard standard standard standard library to library to library to library to target to target to target to target to the siliconthe siliconthe siliconthe silicon24 February 2000 11Types of Configurability Quantity, size, etc.Quantity, size, etc.Quantity, size, etc.Quantity, size, etc.• Often significant payback (e.g. cache size) Options Options Options Options (sort of quantity 0 or 1)• e.g. FP or not, MMU or not, DSP or not, … ParametersParametersParametersParameters• e.g. addresses of vectors,
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