Name 1 MASSACHVSETTS INSTITVTE OF TECHNOLOGY Department of Electrical Engineering and Computer Science 6 002 Electronic Circuits December 19 2001 Final Exam Note The pages in this exam are numbered 1 13 Please check that all pages are present You may use three pages of notes and a calculator in this exam Some of the questions in this exam are multiple choice Some of the problems require you to circle all of the appropriate choices We will look only at the circled choices we will not consider long answers for the multiple choice questions For long answers please write clear and concise answers to the questions in the spaces provided in this booklet You may use extra paper if needed but the spaces we provide are surely big enough to contain the simple answers we are looking for You must be brief but complete and clear We will certainly give you no credit for an answer that we cannot decode You must put your name in the place provided at the top of each page of the exam DO IT NOW You must also put your name the name of your tutor and the name of your recitation instructor in the places provided below Name Tutor Recitation Instructor Problem 1 2 3 4 5 Grade Grader Name 2 1 Consider the CMOS logic circuit shown below Assume that the ON resistance of each of the transistors both PMOS and NMOS transistors is R Also assume that we are only considering very low frequency or steady dc signals 4V A A B B A A B B vOUT C a Assuming that only legitimate logic levels are applied to the inputs of this circuit which of the following voltages may be possible values of vOU T Circle all answers that are appropriate 0 1 12 7 2 16 7 3 4 b Which of the following input combinations cause large static power dissipation Circle all answers that are appropriate A 0 B 0 C 0 A 1 B 0 C 0 A 0 B 1 C 0 A 1 B 1 C 0 A 0 B 0 C 1 A 1 B 0 C 1 A 0 B 1 C 1 A 1 B 1 C 1 c It is proposed to eliminate the combinations that cause large static power dissipation by tying a single input to a high 1 or low 0 logic level Circle all of the possibilities that could work or the word none if no single assignment would work A 0 B 0 C 0 A 1 B 1 C 1 none d Assume that we connect the C input to the A input In the space provided below write a Boolean logic expression for the value of vOU T in terms of A and B and their complements Answer Name 3 2 Remember that two circuits are terminal equivalent if and only if they have identical behavior as determined in terms of voltages between terminals and currents into terminals For each pair of circuits shown below the circuits are terminal equivalent when the unspeci ed circuit parameters satisfy some relations For each pair you are to determine the constraints on the parameters that make the circuits terminal equivalent a In the space provided below write the relationship between C1 and C2 that makes these circuits equivalent i v i C 1 3v v C2 Answer b In the space provided below write the values of L and R that make these circuits terminal equivalent for sinusoidal excitations at the angular frequency of 500 radians second v Answer i 6H 1 F 1k v i R L Name 4 c In the space provided below write the values of vA and R in terms of vI R1 R2 and R3 that make these circuits terminal equivalent You may assume that the opamp has in nite gain R1 R3 R2 R i vI i vA R3 v v Answer d In the space provided below write the constraints on L R V and I that make these circuits equivalent at a speci ed frequency 1mH vI i 1k vI V cos t Answer v i iI L R v i I I sin t Name 5 3 The gure below shows a model for the output lter and load of a dc dc power converter The voltage source models the input from the power converter s switching stage The resistor models the load of the power converter The lter is composed of the inductor and the capacitor The parameters are L 100 H and C 100 F L vIN C R vOUT a Assume that the power converter has been operating with vIN t 5 5 sin 105 t and a load of R 1 for a long time In the space provided below derive an expression for the output voltage vOU T t using numerical element values Answer Name 6 b Now assume that the lter is supplied from a dc source vIN t 5 Assume that the system has been operating with a load of R 1 for all t 0 At t 0 the load changes to R 2 i The output voltage vOU T t has the form vOU T t V0 V1 e t cos t V2 e t sin t for Determine and ii Determine initial conditions for vOU T 0 and iii Determine V0 V1 and V2 dvOU T dt 0 t 0 Name 7 4 We have learned that we can maximize the power dissipated in a load attached to a The venin source as in the gure below by arranging that the resistance of the load is equal to the resistance of the source vT RT RL vO We can de ne the power gain of such a network by the formula G 2 R vO L 2 vT 4RT a In the space provided below give the numerical value of G for the circuit shown above when RT 100 and RL 1 Answer b In the space provided below show that G 1 for a load matched to the source and that G 1 if the load is either too big or too small Remember The load is matched to the source means that we have chosen RL so that RL RT Answer Name 8 c It is proposed that if we insert a lossless network between the source and the load as shown below we can improve the power gain G vT L RT C RL vO RT RL L C 100 1 10H 0 1F In the space provided below write the system function H s Answer Vo Vt for this new network Name 9 d The frequency response of the network of part 4c above H j has the form shown below H j max H H 0 0 In the spaces provided below give the values of the parameters requested i max H max H is the height of the peak of the curve ii 0 0 is the angular frequency of the peak in the curve iii is the width of the curve where H max H 2 iv H 0 H 0 …
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