Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6 002 Circuits Electronics Spring 2004 Problem Set 7 Issued 3 17 04 Due 3 31 04 Exercise 7 1 Each network shown below has a non zero initial state at t 0 as indicated Find the network states for t 0 Hint what equivalent resistance is in parallel with each capacitor or inductor and what decay time results from this combination v t C R1 i t L R2 R1 v t C R2 R2 R1 L R1 i 0 I v 0 V v 0 V i t R2 i 0 I Exercise 7 2 The network shown below contains a voltage source having amplitude V a switch a 1 k resistor and a capacitor having capacitance C all in series At t 0 the switch closes after which the capacitor voltage vC is measured as shown below From the measured voltage determine V C and the capacitor voltage before the switch closed Note the last page of this problem set contains a larger graph of the capacitor voltage It can be turned in with your problem set solutions Capacitor Voltage 10 9 8 V v t C Capacitor Voltage V 7 1k 6 5 4 3 2 1 0 0 1 2 3 4 5 Time ms 6 7 8 9 10 Exercise 7 3 The network shown below has two ports two resistors and one inductor The resistor values R1 and R2 and the inductor value L are all unknown Also shown below is the result of an experiment performed on the network in which one port is driven with the voltage step vIN at t 0 and the other port is loaded with a 1 k resistor Using result of the experiment namely the measured current iIN nd the values R1 R2 and L Also nd the voltage vOUT across the load resistor for t 0 Assume that the network inductor carries no current prior to t 0 Network iIN t R2 R1 vIN t L vIN t 1k vOUT t iIN t 4V 4mA 1mA iIN t 4mA 3mAe t 1 s t t Problem 7 1 This problem examines the relation between transient responses of linear systems The network shown below is rst driven by a current step at t 0 then driven by a current ramp at t 0 and nally driven by the current step plus the current ramp at t 0 In the rst two cases the inductor has zero initial current as indicated A Find the inductor current i t in response to the current step shown below Assume that i 0 0 B Find the inductor current i t in response to the current ramp shown below Again assume that i 0 0 C The step input can be constructed from the ramp input according to IStep t Show that their respective responses are related in a similar manner 1 d dt IRamp t D Would the result from Part C hold if i 0 0 Why or why not E Finally nd the inductor current i t in response to the current step plus the current ramp that is to I t I 1 t for t 0 This time assume that i 0 i Hint think superposition Problem 7 2 The circuit shown below can be used to regulate the current through an inductor Typical applications include the regulation of currents in motors solenoids and loud speakers all I t Step I t Ramp IO i t R I t IO t t t L i 0 0 of which have inductive windings We will analyze the circuit assuming that it operates in a cyclic manner with switching period T During the rst part of each period which lasts for a duration DT switches S1 and S4 are on while switches S2 and S3 are o During the second part of each switching period which lasts for a duration 1 D T switches S1 and S4 are o while switches S2 and S3 are on Note that 0 D 1 A Assume that D is constant and that the circuit has been operating long enough to reach a cyclic steady state by t 0 at which point a new switching period begins In terms of the unknown i 0 determine i t for 0 t T B Use your result from Part A and the fact that the circuit operates in a cyclic steady state to determine i 0 Note that with this result and that from Part A i t is completely determined C Find the average value of i t over the period 0 t T Hint is it necessary to average the result from Part A or is there a faster method to nd the average D Suppose that the circuit has been operating with D D1 for a time long enough to reach a cyclic steady state by t 0 Suppose that D switches to D D2 at t 0 just as a new switching period begins In this case determine i t for t 0 Hint can you use your result from Parts A and B as a particular solution over the interval 0 t S2 S1 R VS S3 L i t S4 Problem 7 3 Consider the digital logic circuit shown below Model each MOSFET with the switch resistor model and let the on state resistance RON satisfy RON RPU Further assume that MOSFET M4 has a gate to source capacitance CGS Given that the inputs IN1 IN2 and IN3 cycle through the combinations 000 001 010 011 100 101 110 111 determine the average power dissipated by the logic circuit Assume that each input combination is held for the period T with T RPU CGS Make appropriate simpli cations based on the inequalities for RON and T RPU RPU OUT M4 IN1 M1 M3 VS IN2 IN3 M2 Problem 7 4 The network shown below contains a 1 F capacitor and a 1 mH inductor At t 0 the capacitor voltage vC is 10 V and the inductor current iL is 200 mA A Over what period do the network states oscillate B What is the maximum value that vC will reach C What is the maximum value that iL will reach D At what time after t 0 will vC rst reach its maximum positive value E At what time after t 0 will iL rst reach its maximum positive value iL vC 1 F 1mH Capacitor Voltage 10 9 8 Capacitor Voltage V 7 6 5 4 3 2 1 0 0 1 2 3 4 5 Time ms 6 7 8 9 10
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