Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6 002 Circuits Electronics Spring 2004 Quiz 2 1 April 2004 Name Please put your name in the space provided above and circle the name of your recitation instructor together with the time of your recitation Do your work for each question within the boundaries of the question When finished write your answer to each question in the corresponding answer box that follows the question This is a closed book quiz but calculators are allowed Graded quizzes will be returned in recitation on Wednesday April 7 If you do not attend recitation on that day then it is your responsibility to get your quiz from your recitation instructor You will have until recitation on Wednesday April 21 to request a quiz grading review regardless of whether or not you attend recitation on Wednesday April 7 and take back your quiz If you wish to have your quiz grade reviewed you must return your quiz to your recitation instructor within the two week period together with a written explanation of why you think a grading mistake was made This is the only way in which a quiz grade will be reviewed Good luck Problem 1 Problem 2 Problem 3 Total Grade Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY Problem 1 35 A hypothetical leaky MOSFET L MOSFET is modeled with the additional gate tosource resistance RGS as shown below Also shown below is an inverter constructed using the L MOSFET Assume that the inverter drives N identical inverters from its output as indicated Given this load the inverter is required to obey the standard static discipline defined by 0 VOL VIL VIH VOH VS Inverter L MOSFET Model D Open for v V Closed for v V GS G GS RGS CGS RPU T T RON vIN VS To N other gate inputs vOUT S 1A The static CGS 0 input output characteristic of the inverter is as shown below Determine the voltages VA VB and VC that define this characteristic Express the voltages in terms of VS RPU N and the L MOSFET parameters vOUT VS VA VB 0 vIN VC VS VA VB VC Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY 1B In terms of the static discipline parameters VOL VIL VIH and VOH determine the voltage range within which the threshold voltage VT must be designed for the inverter to obey the static CGS 0 discipline at its input VT Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY 1C Determine the resistance range within which the pull up resistance RPU must be designed for the inverter to obey the standard static CGS 0 discipline at its output Express the range in terms of VS N the L MOSFET parameters and the static discipline parameters RPU Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY 1D Assume that vIN t VT for t 0 so that the L MOSFET switch is initially closed For t 0 vIN steps to vIN t VT so that the L MOSFET switch opens For this input determine the dynamic CGS 0 response of the inverter That is determine vOUT t for t 0 Express vOUT in terms of VS RPU N the L MOSFET parameters You may also use VA VB and VC from Part 1A in your answer vOUT t 0 Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY Problem 2 30 This problem concerns the analysis of the MOSFET amplifier shown below For the purposes of this analysis assume that the MOSFET operates in its saturation region The corresponding MOSFET characteristics are also given below RD VS 2A vIN RS Saturation Region vOUT vDS vGS VT 0 iD 0 5K vGS VT 2 Determine vOUT as a function of vIN Express vOUT in terms of the circuit parameters and the MOSFET parameters vOUT Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY 2B Let vIN VIN vin where VIN and vin are the large signal and small signal components of vIN respectively Further let vOUT VOUT vout where VOUT and vout are the largesignal and small signal components of vOUT respectively Assume that the amplifier is biased with a value of VIN that results in saturated operation of the MOSFET For this case draw the circuit that models the small signal behavior of the amplifier and that can be used to determine vout from vin Clearly label the components in the model Model Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY 2C Determine the small signal gain vout vin of the amplifier Express the gain in terms of the amplifier parameters the MOSFET parameters and the bias voltage VIN vout vin Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY Problem 3 35 A signal generator having Thevenin resistance RSG is connected to Port 1 of a two port network as shown below At t 0 the Thevenin voltage vSG t of the signal generator takes a step from zero to VSG and the voltage v2 t is measured at Port 2 as shown below with the port open circuited Note that is a unitless constant satisfying 0 1 and is a time constant Assume that the Thevenin voltage of the signal generator is zero for a very long time prior to the step vSG t VSG 1 RSG vSG t Port 1 Port 2 t 0 3A Network Signal Generator v2 t v2 t VSG VSG 0 VSG 1 e t t Which of the following could be the two port network RC A 2 1 C R 2 1 C R B Network Circle One 2 1 2 1 D C A R C B C R C 2 E D E Cite as Anant Agarwal and Jeffrey Lang course materials for 6 002 Circuits and Electronics Spring 2007 MIT OpenCourseWare http ocw mit edu Massachusetts Institute of Technology Downloaded on DD Month YYYY 3B 1 Which
View Full Document
Unlocking...