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TAMU ECEN 248 - The Design of Survivable Networks

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ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGNSlides courtesy Dr. A. DEMOSTHENOUS UNIVERSITY COLLEGE OF LONDONAsynchronous sequential circuits:DefinitionsExampleTransition TableState TableSlide 8Flow Tables of Previous ExamplesRaceCritical raceCycles to avoid RacesExample CircuitSR LatchConstraints on InputsECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGNDr. ShiDept. of Electrical and Computer EngineeringSlides courtesyDr. A. DEMOSTHENOUSUNIVERSITY COLLEGE OF LONDONAsynchronous sequential circuits:Do not use clock pulses. The change of internal state occurs when there is a change in the input variable. Their memory elements are either unclocked flip-flops or time-delay elements. They often resemble combinational circuits with feedback. Their synthesis is much more difficult than the synthesis of clocked synchronous sequential circuits. They are used when speed of operation is important.DefinitionsThe present state variables (y1 to yk) are called secondary variables. The next state variables (Y1 to Yk) are called excitation variables.Assumption: The input signals change one at a time and only when the circuit is in a stable condition.ExampleThe analysis of the circuit starts by considering the excitation variables (Y1and Y2) as outputs and the secondary variables (y1 and y2) as inputs.Transition TableState TableExampleFlow Tables of Previous ExamplesRaceA race condition exists in an asynchronous circuit when two or more binary state variables change value in response to a change in an input variable.Non CriticalCritical raceCritical RaceCycles to avoid RacesUnique pathExample CircuitSR LatchConstraints on


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TAMU ECEN 248 - The Design of Survivable Networks

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