Lecture 13 EGR 270 Fundamentals of Computer Engineering 1 Reading Assignment Chapter 5 in Logic and Computer Design Fundamentals 4 th Edition by Mano Online supplement to text Design and Analysis using JK and T Flip Flops www prenhall com mano Sequential Counters Counters are an important class of sequential circuits Counters follow a predetermined sequence of states A counter changes state upon application of an input pulse The input pulse is not necessarily a periodic clock For example a traffic counter is clocked each time a car passes Key uses of counters Count occurrences of an event Example Traffic counter Example Line counter on ASEE autonomous vehicle illustrate in class Generate timing sequences to control operations Frequency division Lecture 13 EGR 270 Fundamentals of Computer Engineering Example Show that a JK flip flop in the toggle mode acts as a modulo 2 counter or a divide by 2 circuit 2 Lecture 13 EGR 270 Fundamentals of Computer Engineering Example Show that a 3 bit counter can serve as a modulo 8 counter or a divide by 8 circuit 3 Lecture 13 EGR 270 Fundamentals of Computer Engineering 4 Example Show how a circuit with a 1MHz master clock might use counters as frequency dividers to provide synchronized lower frequencies Note This same technique can be used in software In Lab 7 we will use a VHDL program that implements a divide by 50 million circuit to produce a 1 Hz clock from the 50 MHz internal clock on an FPGA board We will need the 1 Hz clock to display a designed counting sequence on a 7 segment display Lecture 13 EGR 270 Fundamentals of Computer Engineering Simplified Counter Design using T flip flops A full circuit excitation table may not be necessary in some cases with T flip flops especially when the states are in counting order It is easy to see which bits need to be toggled to produce the next state Example Design a mod 6 counter using T flip flops 5 Lecture 13 EGR 270 Fundamentals of Computer Engineering Counters with multiple counting sequences Switches can be easily used to control counting direction or counting sequences Example Design a mod 6 UP DOWN counter using T flip flops 6 Lecture 13 EGR 270 Fundamentals of Computer Engineering Example Design a counter with 2 input switches x and y that can count in 4 possible sequences based on the switch positions Use JK flip flops 7 Lecture 13 EGR 270 Fundamentals of Computer Engineering Flip flop Excitation Tables Q t Q t 1 J K S R D T 0 0 0 X 0 X 0 0 0 1 1 X 1 0 1 1 1 0 X 1 0 1 0 1 1 1 X 0 X 0 1 0 Circuit Excitation Table Present State Circuit Inputs 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Next State Flip flop Inputs and Circuit Outputs 8 Lecture 13 EGR 270 Fundamentals of Computer Engineering Flip flop Input Functions and Circuit Output Functions 00 01 11 10 00 01 11 10 00 01 11 10 00 01 11 10 00 00 00 00 01 01 01 01 11 11 11 11 10 10 10 10 00 01 11 10 00 01 11 10 00 01 11 10 00 01 11 10 00 00 00 00 01 01 01 01 11 11 11 11 10 10 10 10 9 Lecture 13 EGR 270 Fundamentals of Computer Engineering 10 Self starting counters Counters are considered to be self starting if all unused counts eventually lead to the correct counting sequence Since the initial state for a flip flop is unpredictable upon powering up the IC a counter that is not self starting could possibly power up into an unused state that would not eventually go into the correct counting sequence so the counter might lock up in an incorrect count or counting pattern Recall that the next states for unused counts were sometimes treated as don t cares With this method it is difficult to predict what will happen if the counter powers up into an unused count although it can be later determined by analyzing the circuit A safer technique it to let all unused counts have a valid count for their next state Lecture 13 11 EGR 270 Fundamentals of Computer Engineering Example Consider the state diagrams for two modulo 5 counters below Are they self starting Case 1 Counter is NOT self starting Next states for unused counts 5 6 and 7 were perhaps treated as don t cares 6 5 Case 2 Counter is self starting Next states for unused counts 5 6 and 7 were all set to count 0 5 7 0 7 0 4 1 3 6 2 4 1 3 2 Lecture 13 Example Determine the counting sequence for the counter shown begin with count 0 Use a timing diagram to display the values of Clock JA KA JB KB JC KC A B and C Is the counter self starting 1 JA QA KA QA JB QB KB QB JC QC KC QC Clock Clock JA KA JB KB JC C KC A B C 12 EGR 270 Fundamentals of Computer Engineering A MSB B C Count Lecture 13 13 EGR 270 Fundamentals of Computer Engineering Sequence Detector An example of a circuit whose output sequence is critical and the numeric value of the states is unimportant is a sequence detector Such a circuit might be used to detect a certain bit pattern such as in synchronizing two signals or for a digital lock where the lock is unlocked when a correct combination sequence is entered Input X Sequence Detector Output Y Example Detect the sequence 101 including overlapping sequences Define the output Y as follows 0 Input sequence not detected Y 1 Input sequence detected Fill out the values for Y in the table below X Y 0 0 1 0 1 1 0 0 1 0 1 0 1 0 0 1 Lecture 13 EGR 270 Fundamentals of Computer Engineering 14 Example Design a sequence detector to detect the sequence 1010 The sequence detector should also detect overlapping sequences The circuit should output a binary 1 when a valid sequence is detected Show designs using both Moore and Mealy models Moore Model Mealy Model Lecture 13 15 EGR 270 Fundamentals of Computer Engineering Example continued Test the state diagram from the previous page with the input sequence 0101011001010100 to see if they produce the same output sequence Moore Model State A Input 0 1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0 1 0 1 1 0 0 1 0 1 0 1 0 0 Output Mealy Model State A Input 0 Output 1 Lecture 13 EGR 270 Fundamentals of Computer Engineering Example continued Draw the …