PowerPoint PresentationSlide 2Slide 3Slide 4Slide 5Slide 6Slide 7Slide 8Slide 9Slide 10Slide 11Slide 12Slide 13Slide 14Slide 15Slide 16Slide 171Sequential CountersCounters are an important class of sequential circuits.Counters follow a predetermined sequence of states.A counter changes state upon application of an input pulse. The input pulse is not necessarily a periodic clock. For example, a traffic counter is “clocked” each time a car passes.Key uses of counters• Count occurrences of an eventExample: Traffic counterExample: Line counter on ASEE autonomous vehicle (illustrate in class)• Generate timing sequences to control operations• Frequency divisionReading Assignment: - Chapter 5 in Logic and Computer Design Fundamentals, 4th Edition by Mano- Online supplement to text “Design and Analysis using JK and T Flip-Flops”(www.prenhall.com/mano)Lecture #13 EGR 270 – Fundamentals of Computer Engineering2Example: Show that a JK flip-flop in the toggle mode acts as a modulo-2 counter or a divide-by-2 circuit.Lecture #13 EGR 270 – Fundamentals of Computer Engineering3Example: Show that a 3-bit counter can serve as a modulo-8 counter or a divide-by-8 circuit.Lecture #13 EGR 270 – Fundamentals of Computer Engineering4Example: Show how a circuit with a 1MHz master clock might use counters (as frequency dividers) to provide synchronized lower frequencies.Lecture #13 EGR 270 – Fundamentals of Computer EngineeringNote: This same technique can be used in software. In Lab 7 we will use a VHDL program that implements a “divide-by-50 million” circuit to produce a 1 Hz clock from the 50 MHz internal clock on an FPGA board. We will need the 1 Hz clock to display a designed counting sequence on a 7-segment display.5Simplified Counter Design using T flip-flopsA full circuit excitation table may not be necessary in some cases with T flip-flops, especially when the states are in counting order. It is easy to see which bits need to be toggled to produce the next state.Example: Design a mod-6 counter using T flip-flops.Lecture #13 EGR 270 – Fundamentals of Computer Engineering6Counters with multiple counting sequencesSwitches can be easily used to control counting direction or counting sequences.Example: Design a mod-6 UP/DOWN counter using T flip-flops.Lecture #13 EGR 270 – Fundamentals of Computer Engineering7Example: Design a counter with 2 input switches, x and y, that can count in 4 possible sequences based on the switch positions. Use JK flip-flops.Lecture #13 EGR 270 – Fundamentals of Computer Engineering8Flip-flop Excitation TablesQ(t) Q(t+1) J K S R D T0 0 0 X 0 X 0 00 1 1 X 1 0 1 11 0 X 1 0 1 0 11 1 X 0 X 0 1 0Circuit Excitation TablePresent State/Circuit Inputs Next State Flip-flop Inputs and Circuit Outputs0 0 0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 1Lecture #13 EGR 270 – Fundamentals of Computer Engineering9Flip-flop Input Functions and Circuit Output Functions0000 01 11 100111100000 01 11 100111100000 01 11 100111100000 01 11 100111100000 01 11 100111100000 01 11 100111100000 01 11 100111100000 01 11 10011110Lecture #13 EGR 270 – Fundamentals of Computer Engineering10Self-starting counters Counters are considered to be self-starting if all unused counts eventually lead to the correct counting sequence. Since the initial state for a flip-flop is unpredictable upon powering up the IC, a counter that is not self-starting could possibly power up into an unused state that would not eventually go into the correct counting sequence (so the counter might “lock up” in an incorrect count or counting pattern.Recall that the next states for unused counts were sometimes treated as “don’t cares.” With this method it is difficult to predict what will happen if the counter powers up into an unused count (although it can be later determined by analyzing the circuit). A safer technique it to let all unused counts have a valid count for their next state.Lecture #13 EGR 270 – Fundamentals of Computer Engineering11Example: Consider the state diagrams for two modulo-5 counters below. Are they self-starting?0123456 7012345 6 7Case 1: Counter is NOT self-starting.Next states for unused counts 5, 6, and 7 were perhaps treated as don’t cares.Case 2: Counter is self-starting.Next states for unused counts 5, 6, and 7 were all set to count 0.Lecture #13 EGR 270 – Fundamentals of Computer Engineering12ClockJAKAJBKBCJCKCABCExample: Determine the counting sequencefor the counter shown (begin with count 0).Use a timing diagram to display the valuesof Clock, JA, KA, JB, KB, JC, KC, A, B, and C. Is the counter self-starting?JA KA QA QA Clock JB KB QB QB JC KC QC QC Count A (MSB) B C 1 Lecture #13 EGR 270 – Fundamentals of Computer Engineering13Sequence Detector: An example of a circuit whose output sequence is critical and the numeric value of the states is unimportant is a “sequence detector”. Such a circuit might be used to detect a certain bit pattern (such as in synchronizing two signals) or for a digital lock – where the lock is unlocked when a correct combination (sequence) is entered.Lecture #13 EGR 270 – Fundamentals of Computer EngineeringSequence DetectorInput, XOutput, Y detected sequenceInput 1detectednot sequenceInput 0 YExample: Detect the sequence 101, including overlapping sequences. Define the output, Y, as follows:Fill out the values for Y in the table below:X 0 0 1 0 1 1 0 0 1 0 1 0 1 0 0 1Y14Example: Design a sequence detector to detect the sequence 1010. The sequence detector should also detect overlapping sequences. The circuit should output a binary 1 when a valid sequence is detected. Show designs using both Moore and Mealy models.Lecture #13 EGR 270 – Fundamentals of Computer EngineeringMoore Model:Mealy Model:15Example: (continued) Test the state diagram from the previous page with the input sequence 0101011001010100 to see if they produce the same output sequence.Moore Model:Mealy Model:StateA Input0 1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 Output StateA Input0 1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 Output Lecture #13 EGR 270 – Fundamentals of Computer Engineering16Example: (continued) Draw the logic