Lecture 14 EGR 270 Fundamentals of Computer Engineering Reading Assignment Chapter 5 in Logic and Computer Design Fundamentals 4th Edition by Mano Recall that three methods for designing sequential circuits will be covered 1 Excitation table method already covered 2 State equation method 3 One Hot method Designing Sequential Circuits using State Equations Before the state equation method is covered two related topics must be covered state equations flip flop characteristic equations State Equations A state equation is an equation for the next state of a sequential logic circuit It has the form Q t 1 Boolean expression involving present states and inputs The state equations are simply formed using the Next State shown in the state table 1 Lecture 14 EGR 270 Fundamentals of Computer Engineering Example Find the state equations for the state diagram shown below 0 1 0 0 1 4 1 0 1 1 2 3 0 1 0 2 Lecture 14 EGR 270 Fundamentals of Computer Engineering Flip flop characteristic equations Flip flop behavior has been expressed so far using truth tables or excitation tables The next state output of a flip flop can also be described algebraically using a flip flop state equation or flip flop characteristic equation Example Develop the flip flop characteristic equation for a JK flip flop 3 Lecture 14 EGR 270 Fundamentals of Computer Engineering Example Develop flip flop characteristic equations for SR D and T flip flops 4 Lecture 14 EGR 270 Fundamentals of Computer Engineering Designing Sequential Circuits using State Equations Procedure 1 2 3 4 Form the state table Develop the state equations from the state table Determine the type of flip flop to be used Manipulate the state equation into the form of the characteristic equation for each flip flop This will yield the flip flop input expressions Notes It is easiest to design by state equations using D flip flops Many PLD s only support D flip flop designs so state equations are very useful JK flip flop designs will yield the simplest circuits in general Designing circuits by the excitation table method and by the state equation method should yield the same results 5 Lecture 14 EGR 270 Fundamentals of Computer Engineering Example Design a modulo 7 counter by the state equation method using A D flip flops 6 Lecture 14 EGR 270 Fundamentals of Computer Engineering Example Design a modulo 7 counter by the state equation method using B JK flip flops 7 Lecture 14 EGR 270 Fundamentals of Computer Engineering Three methods for designing synchronous sequential circuits 1 Excitation table method already covered 2 State equation method already covered 3 One Hot method One Hot Method for designing synchronous sequential circuits The one hot method is based on the idea that N flip flops will be used to represent N states and that at any given time only one of the states is hot or HIGH the current state Example A state diagram with 4 states would require 4 flip flops and the outputs would be as follows Q Other connections and circuitry Q 1 0 State A is hot Other connections and circuitry Q 0 Q 1 Q 0 Q 0 Q 0 Q 0 State B is hot Similar diagrams for states C and D are not shown 8 Lecture 14 EGR 270 Fundamentals of Computer Engineering One Hot Method Advantage The design process is simple for the one hot method The connections for D flip flop designs can be seen easily from an ASM Algorithmic State Machine Chart which is similar to a flowchart Also note that this method can allow for a simple way to describe sequential circuits in VHDL Algorithmic State Machine ASM Chart symbols ASM Charts are covered in more detail in Chapter 8 of the text For now we will just introduce two ASM chart symbols elements Entry State 0 Exit State box Entry 0 1 bit Condition Exit 0 1 Exit 1 Decision box 9 Lecture 14 EGR 270 Fundamentals of Computer Engineering One Hot Method Disadvantage The one hot method requires a potentially large number of flip flops Since the states are not encoded as with other methods i e one flip flop is required for each state designs may require a large number of flip flops Examples are provided below to illustrate this problem Sequential Circuit flip flops using encoded states state equations or excitation table method flip flops log2 states flip flops using the onehot method flip flops states 3 bit mod 8 counter 3 8 8 bit counter 8 256 Circuit with 20 states 5 20 Note When we implement sequential circuits using Aldec Active HDL into specific PLDs the software gives us a choice of implementing a one hot design the default or using encoded states which saves many flip flops 10 Lecture 14 EGR 270 Fundamentals of Computer Engineering Example Use the one hot method to design a mod 5 counter Note that each state box essentially acts like a D flip flop where the entry to the box is D and the exit from the box is Q ASM Chart State diagram 0 4 1 3 State 0 So Q0 t 1 D0 Q4 State 1 So Q1 t 1 D1 Q0 State 2 So Q2 t 1 D2 Q1 State 3 So Q3 t 1 D3 Q2 State 4 So Q4 t 1 D4 Q3 2 11 Lecture 14 EGR 270 Fundamentals of Computer Engineering Example mod 5 counter continued Q0 t 1 D0 Q4 Q1 t 1 D1 Q0 Q2 t 1 D2 Q1 Q3 t 1 D3 Q2 Q4 t 1 D4 Q3 D0 Q0 Q0 D1 Q1 D2 Q1 Q2 Q2 D3 Q3 D4 Q3 Q4 Q4 CK Logic Diagram A Label the output on the logic diagram above for state 4 count 4 B Redraw the logic diagram with an encoder added to encode the states 12 Find the state equations Lecture 14 EGR 270 State 0 Example Use the one hot method to design a mod 5 counter UP DOWN Let x be an input control where if x 0 the counter counts down x 1 the counter counts up 0 x 0 or 1 Q0 t 1 D0 1 State 1 0 x 0 or 1 Q1 t 1 D1 1 ASM Chart State 2 State diagram 0 1 0 4 0 0 x 0 or 1 Q3 t 1 D3 1 State 4 2 1 1 1 0 3 x 0 or 1 State 3 1 0 0 1 0 1 Q2 t 1 D2 0 x 0 or 1 Q4 t 1 D4 1 13 Lecture 14 EGR 270 Fundamentals of Computer Engineering Example mod 5 UP DOWN counter continued Draw the logic diagram 14