Binary logic Binary logic is a mathematical system that lets us reason about logic statements IF The garage door is open AND The engine is running THEN The car can be backed out of the garage The car can be backed out only when both conditions are true IF The N S light is green AND The E W light is red AND The N S light has been green for more than 45 sec OR There are no cars on the N S road THEN The N S lights can be changed from green to yellow Seattle Pacific University EE 1210 Logic System Design The light will become yellow only if it s been green for 45 seconds or nobody is on the road TruthTables 1 Combinational Logic IF The garage door is open AND The engine is running THEN The car can be backed out of the garage Each input can be either True or False What is the output for each combination of inputs Door Open False False True True Engine Running False True False True OK to Back Out False False False True There are 2N combinations to be considered for N binary inputs Seattle Pacific University EE 1210 Logic System Design TruthTables 2 Truth tables Truth tables enumerate all possible input combinations For each input tabulate the output There may be more than one independent output A truth table that enumerates all input combinations completely defines any logic function X F T Input not X T F Output Seattle Pacific University For n inputs 2n rows X Y F F T T F T F T X and Y F F F T X Y F F T T F T F T EE 1210 Logic System Design X or Y F T T T TruthTables 3 The Binary Connection Truth or Falsehood is a Binary operation Everything is either True or False no in betweens Represent True using 1 Represent False using 0 X 0 1 Input not X 1 0 Output X Y 0 0 1 1 0 1 0 1 X and Y 0 0 0 1 X Y 0 0 1 1 0 1 0 1 X or Y 0 1 1 1 Note Number combinations in binary numeric order 00 01 10 11 Seattle Pacific University EE 1210 Logic System Design 2 2 TruthTables 4 Example Function F a b c d should be 1 whenever there are an even number of inputs that are 1 Function G a b c d should be 1 whenever c is 1 or d is 1 but not when a or b is 1 Seattle Pacific University a 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 b 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 c 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 d 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 EE 1210 Logic System Design F 1 0 0 1 0 1 1 0 0 1 1 0 1 0 0 1 G 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 TruthTables 5 Illegal Inputs The women s basketball team is looking for good players women 5 9 or taller The data available is M True if male F True if female T True if 5 9 or taller S True if 5 9 Many combinations are impossible Can t be Male and Female Can t be Tall and Short Impossible input combinations are marked with an X Called a don t care Seattle Pacific University M F T S 0 0 0 0 X 0 0 0 1 X 0 0 1 0 X 0 0 1 1 X 0 1 0 0 X 0 1 0 1 0 0 1 1 0 1 0 1 1 1 X 1 0 0 0 X 1 0 0 1 0 1 0 1 0 0 1 0 1 1 X 1 1 0 0 X 1 1 0 1 X 1 1 1 0 X 1 1 1 1 X EE 1210 Logic System Design Good TruthTables 6 Logic Primitives not x x and y x or y x x x x x y x y x y xy x y x y x y precedence rules x y x y xy x y x y z x y z x y z x y z NOT before AND before OR Seattle Pacific University EE 1210 Logic System Design TruthTables 7 Complex expressions Z A B C D Z A B C D C T2 C D D T1 B T2 Z A T1 T2 B C D T1 A B Z C D Seattle Pacific University EE 1210 Logic System Design TruthTables 8 Timing diagram A timing diagram may be used to express the behavior of a A 0 0 0 0 1 1 1 1 0 0 0 0 B 0 0 1 1 0 0 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 0 0 0 0 0 1 1 1 0 1 1 1 0 1 1 1 0 0 0 0 logic system A B C T1 Z T2 Inputs 1 A0 C 0 1 0 1 0 1 0 1 T1 1 1 1 1 0 0 0 0 1 T2 0 1 1 1 0 1 1 1 Z 0 1 1 1 0 0 0 0 1 1 1 B0 1 C0 1 T1 0 1 T2 0 1 Z0 Seattle Pacific University EE 1210 Logic System Design TruthTables 9 Functions of two variables X Y 0 0 0 1 1 0 1 1 0 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X Y X Y X Y Y X 1 There are sixteen functions of two variables We ve only seen eight of them so far Seattle Pacific University EE 1210 Logic System Design TruthTables 10 NANDs and NORs X nand Y not X and Y X Y X 0 0 1 1 X nor Y not X or Y Z 1 1 1 0 X Y X 0 0 1 1 Seattle Pacific University Y 0 1 0 1 Y 0 1 0 1 EE 1210 Logic System Design Z 1 0 0 0 TruthTables 11 XORs and XNORs Exclusive OR XOR Z X Y Equivalence gate XNOR Z X Y Seattle Pacific University X 0 0 1 1 Y 0 1 0 1 Z 0 1 1 0 XOR True if …