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Logic ChipsLogic Chips – 7400 NANDLogic Chips – Inverters and NORsLogic FamiliesFinding Info on ChipsMaking a logic circuitPrototyping BreadboardsSeattle Pacific University EE 1210 - Logic System DesignStandard Gates-1Logic ChipsHD74LS04P1234567 891011121314HD74LS04PActual circuit is on a small chip of siliconPackage – Made of plastic or ceramicPins are connected to chip with internal wiresPin number one is identified with a dot or notchPins are numbered in a counter-clockwise fashionStandard chips use either TTL (Transistor-Transitor Logic), or CMOS transistorsSeattle Pacific University EE 1210 - Logic System DesignStandard Gates-2Logic Chips – 7400 NAND74LS001234567891011121314Part number – 74xx00 is a 7400 Quad Nand GateGNDVccAll chips have connections to Vcc (+5) and GND – Usually pins 14 and 7There are four 2-input NAND gates in a 7400LS – Low-Power Schottky TTLHC – CMOSHCT – TTL-compatible CMOSF – Fast TTLSeattle Pacific University EE 1210 - Logic System DesignStandard Gates-3Logic Chips – Inverters and NORs1234567891011121314GNDVcc74LS041234567891011121314GNDVcc74LS0274xx04 Hex Inverter 74xx02 Quad NOR GateSeattle Pacific University EE 1210 - Logic System DesignStandard Gates-4Logic Families5V TTLStandard Low-Power Schottky – LSFast - F5V CMOSStandard - HCHCT – TTL compatible054321Input Voltage054321Output Voltage054321Input Voltage054321Output VoltageHighLowHighLowHighLowHighLowWARNING – Don’t mix TTL and HCSeattle Pacific University EE 1210 - Logic System DesignStandard Gates-5Finding Info on Chips•Search online•Enter the part number, with family code•“74LS02 datasheet”•“74HC00 datasheet”•Basic functionality is easy to find•Timing info may require looking up the exact manufacturerSeattle Pacific University EE 1210 - Logic System DesignStandard Gates-6Making a logic circuit1234567891011121314GNDVcc74LS0474LS001234567891011121314GNDVccACABFT1T2T1T2ACABFGNDGND+5 +5AB CFT1T2Convert to NANDsSeattle Pacific University EE 1210 - Logic System DesignStandard Gates-7Prototyping Breadboardsa b c d ef g h i j+-+-+-+-+/- Are connected in columns. Used for connections to +5V and GND.Note: On some boards, they are split in the middlea/b/c/d/e and f/g/h/i/j are connected in rows. Used for connecting to chips. Note: They are not connected in the middle.Connections for Power/GND Connections from chip to chip74LS04 74LS02 74LS00To


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SPU EE 1210 - Logic Chips

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