ECE/CS 5780/6780: Embedded System DesignScott R. LittleLecture 22: Memory InterfacingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 1 / 40IntroductionMost embedded systems use only the memory built-in to themicrocontroller.Memory interfacing and bus timing is important tounderstanding internal microcontroller architecture.Sometimes internal memory is i nsu fficien t, and external memoryis needed.External devices can be interfaced using memory-mapped I/O.Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 2 / 40Memory-Mapped I/OScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 3 / 40Isolated I/OScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 4 / 40Expanded ModeSelect R/W Function0 0 Off0 1 Off1 0 Write1 1 ReadScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 5 / 40Multiplexed Address and Data LinesScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 6 / 40Full-Address DecodingSlave selected only when slave’s address is on the bus.Design using the following steps:1Write specified address using 0,1,X:0100,00XX,XXXX,XXXX for 1K RAM at $4000-$43FF2Write equation using all 0s and 1s:select = A15 · A14 · A13 · A12 · A11 · A103Build circuit using gates.Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 7 / 40Address Decoder for 1K RAM at $4 000- $43FFScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 8 / 40An Address Decoder for I/O Device at $5500Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 9 / 40Minimal-Cost Address DecodingUse don’t cares for uns pec ified addresses to simplify.Example:4K RAM $0000 to $0FFF 0000,XXXX,XXXX,XXXXInput $5000 0101,0000,0000,0000Output $5001 0101,0000,0000,000116K ROM $C000 to $FFFF 11XX,XXXX,XXXX,XXXXScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 10 / 40An Address DecoderScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 11 / 40Karnaugh MapsScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 12 / 40Special CasesSize of the memory is n ot a power of 2.20K RAM with address range $0000 to $4FFF00XX,XXXX,XXXX,XXXX Range $0000 to $3FFF0100,XXXX,XXXX,XXXX Range $4000 to $4FFFStart address divided by memory size not an integer.32K RAM with address range $2000 to $9FFF001X,XXXX,XXXX,XXXX Range $2000 to $3FFF01XX,XXXX,XXXX,XXXX Range $4000 to $7FFF100X,XXXX,XXXX,XXXX Range $8000 to $9FFFScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 13 / 40Programmable Address DecoderIn Mn An Vn Out0 X X X 01 0 X X 11 1 0 0 11 1 1 0 01 1 0 1 01 1 1 11Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 14 / 40Timing Intervals(↑ Y , ↓ Y ) = (↓ A, ↑ A) + 10(↑ Y , ↓ Y ) = (↓ A, ↑ A) + [5, 15](↑ Y , ↓ Y ) = (↓ A + [8, 15], ↑ A + [5, 12])Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 15 / 40Available and Required Time IntervalsDA = (↓ G∗+ [10, 20], ↑ G∗+ [0, 15])DA = (↓ G∗+ 20, ↑ G∗) worst-caseDR = (↑ Clk − 30, ↑ Clk + 5)Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 16 / 40Timing DiagramsScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 17 / 40Example Timing DiagramsScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 18 / 40Read Cycle CircuitScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 19 / 40Write Cycle CircuitScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 20 / 40Synchronous Bus TimingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 21 / 40Partially Asynchronous Bus Timing(6809/680x0/x86)Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 22 / 40Fully Asynchronous Read CycleScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 23 / 40Fully Asynchronous Write CycleScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 24 / 40Four Types of Control SignalsScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 25 / 40MC9S12C32Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 26 / 40MC9S12C32 Modes of OperationBKGD MODB MODA Description Port A Port B MODx write0 0 0 Special In/Out In/Out Write anytime,Single chip not peripheral0 0 1 Emulation A15-A8/ A7-A0 Cannot changeExp. narrow D7-D00 1 0 Special test A15-A8/ A7-A0 Write anytime,Exp. narrow D15-D8 D7-D0 not peripheral0 1 1 Emulation A15-A8/ A7-A0 Cannot changeExp. wide D15-D8 D7-D01 0 0 Normal In/Out In/Out Write once,Single chip Norm exp N/W1 0 1 Normal A15-A8/ A7-A0 Cannot changeExp. narrow D7-D01 1 0 Peripheral − − Cannot change1 1 1 Normal A15-A8/ A7-A0 Cannot changeExp. wide D15-D8 D7-D0Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 27 / 40MC9S12C32 Clock CircuitScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 28 / 40MC9S12C32 Expanded Mode Bus TimingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 29 / 40Address Latch for MC9S12C32Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 30 / 40General Approach to Memory InterfacingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 31 / 40Wide Expanded ModeScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 32 / 408K R AM Read TimingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 33 / 408K R AM Write TimingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 34 / 408K R AM Write TimingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 35 / 408K R AM Interface ($8000-$9FFF)Scott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 36 / 408K R AM Interface Read TimingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 37 / 408K R AM Interface Write TimingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 38 / 408K by 16-bit R AM InterfaceScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 39 / 40Dynamic RAM (DRAM)DRAMs SRAMsHigh density Low densityOne xtor, one cap./bit 3-4 xtors/bitSlower FasterHigh fixed cost (refresh) Low fixed cost (address decoder)Low incremental cost Higher incremental costAddress multiplexing Direct addressingScott R. Little (Lecture 22: Memory Interfacing) ECE/CS 5780/6780 40 /
View Full Document
Unlocking...