Page 1 1 CS 5780 School of Computing University of Utah CS/ECE 6780/5780 Al Davis Today’s topics: • Output capture • Pulse Width Modulation • Pulse Accumulation • all useful options for Lab7 2 CS 5780 School of Computing University of Utah Output Compare • Basic output control create square waves » including PWM duty cycle controlled pulses • for motor and actuator controls implement time delays can be used w/ input capture to measure frequency • Similar to input capture MC9S12C32 has 8 OC channels/modulesPage 2 3 CS 5780 School of Computing University of Utah Each OC Module • Components External output pin – OCn Flag bit Force output compare control bit – FOCn 2 control bits: OMn, OLn Interrupt mask bit 16-bit output compare register TCn 4 CS 5780 School of Computing University of Utah Basic OC Operation • OCn pin used to control an external device • OC event occurs and sets the flag when either: 16-bit TCNT register matches the 16-bit OC register the software writes a 1 to the FOC bit • OMn & Oln specify the effect of the event on the output pin • 2 or 3 actions possible when an OC event happens always » OCn output bit changes » OC compare FLAG is set if the mask bit is 1 » interrupt is requested very similar to the input compare functionalityPage 3 5 CS 5780 School of Computing University of Utah Control Bits & Flags • Same as with input capture TEN must be set = TSCR1[7] to enable TCNT functions » TCNT prescale bits must be set = TSCR2[2:0] OCn associated with PTT[n] » TTL level signal Mask/Arm bits are in TIE Flag bits are in TFLG1 TOF is in TFLG2[7] • Differences use OCn TIOS[n]=1 » for input capture TIOS[n]=DDRT[n] = 0 » for output compare TIOS[n] = 1 implies output • DDRT register value is ignored – no need to set it OM & OL for modules 7:4 are in TCTL1 » for modules 3:0 are in TCTL2 » TCTL3 & TCTL4 were used for Edge bits for input capture FOCn bits are in CFORC[n] register 6 CS 5780 School of Computing University of Utah OM & OL Semantics Grrr – this could have been more intuitive – how?Page 4 7 CS 5780 School of Computing University of Utah Example Application • Create a fixed time delay 1. read current 16-bit TCNT 2. calculate TCNT+fixed!3. set 16-bit TCn register to TCNT+fixed 4. clear CnF flag = TFLG1[n] » same semantics as with input capture » writing a 1 to the flag clears it • OC HW event sets the flag • SW can’t set the flag explicitly 5. wait for the CnF to be set • Note similar to the max latency issue w/ input capture » minimum delay is set by the delay of steps 1-4 above » maximum TCNT delay is 65,536 = 216 cycles 8 CS 5780 School of Computing University of Utah Periodic Interrupt Using Output ComparePage 5 9 CS 5780 School of Computing University of Utah Pulse-Width Modulation (PWM) 80% duty cycle 50% duty cycle 20% duty cycle 10 CS 5780 School of Computing University of Utah Parameterized PWM Duty CyclePage 6 11 CS 5780 School of Computing University of Utah Parameterized PWM Duty Cycle (cont’d) 12 CS 5780 School of Computing University of Utah PWM Overhead • Similar to max latency issue for input capture • Need to figure out the time it takes to process the interrupt plus the time to execute the handler » the if-then-else branch pattern in the handler creates a 1 cycle uncertainty » in general you’ll only care about the worst case • since that will govern your real time schedule • For the previous code:Page 7 13 CS 5780 School of Computing University of Utah Alternative Frequency Measurement Method • Direct measurement count input (rising edge) pulses for a fixed amount of time » use input capture to count pulses » use output compare to create a fixed time interval • Output compare handler calculates frequency • Frequency resolution is: 14 CS 5780 School of Computing University of Utah Alternative Method IllustratedPage 8 15 CS 5780 School of Computing University of Utah Frequency Measurement This code makes some assumptions – what are they? 16 CS 5780 School of Computing University of Utah Frequency Measurement (cont’d) What would main() look like if you wanted to keep sampling?Page 9 17 CS 5780 School of Computing University of Utah More PWM Options • 6812 has a lot of support for PWM pulse accumulator (PA) – 2 modes » external event counting • PACNT is a separate 16-bit event counter – PAOVF = PAFLG[1] set on overflow – PAOVI = PACTL[1] – arms interrupt request on PAOVF – PAIF = PAFLG[0] – set when selected PT7 event happens – PAI = PACTL[0] – arms interrupt request on PAIF event – NOTE PAFLG bits cleared by writing a 1 (similar to other flags) » gated time accumulation • useful for pulse width measurement also associated with PTT[7] • Primary setup using the PACTL register PACTL[6] = PAEN » set to 1 to enable the PA functions PACTL[5:4] = PAMOD:PEDGE semantics » 00 – PT7 falling edge increments PACNT, sets PAIF on falling edge » 01 – PT7 rising edge increments PACNT, sets PAIF on rising edge » 10 – gated time, counts when PT7=1, sets PAIF on falling edge » 11 – gated time, counts when PT7=0, sets PAIF on rising edge 18 CS 5780 School of Computing University of Utah Directionality for PA Functions • PA can work on PT7 events independent of DDRT7 direction » 0:input – stimulus comes from external device » 1:output – stimulus comes from internal device nice flexibility optionPage 10 19 CS 5780 School of Computing University of Utah More PWM Options • Dedicated hardware can create PWM signals on Port P benefit is no overhead • MODRR register can connect PWM system to Port T pins MODRR[n] set connects PTT[n] to PWM system » n can be 0:4 • PWME register is used to enable PWM channels either 6 8-bit channels or 3 16-bit channels » channels 0 & 1 connected if CON01 bit is set (PWMCTL[4]) • similarly with CON23 = PWMCTL[5] • and CON45 = PWMCTL[6] • Each channel has two associated count/duration controls PWMDTY
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