Page 1RISC vs. CISC Instruction SetsCS 740Sept. 13, 2007Topics• Alpha instruction setCS 740 F’07–2–Alpha ProcessorsReduced Instruction Set Computer (RISC)• Simple instructions with regular formats• Key Idea:make the common case fast!– infrequent operations can be synthesized using multiple instructionsAssumes compiler will do optimizations• e.g., scalar optimization, register allocation, scheduling, etc.• ISA designed for compilers, not assembly language programmersA 2nd Generation RISC Instruction Set Architecture• Designed for superscalar processors (i.e. >1 inst per cycle)– avoids some of the pitfalls of earlier RISC ISAs (e.g., delay slots)• Designed as a 64-bit ISA from the startVery high performance machines in their dayCS 740 F’07–3–32 General Purpose Registers$0$1$2$3$4$5$6$7$8$9$10$11$12$13$14$15v0t0t1t2t3t4t5t6t7s0s1s2s3s4s5s6,fpReturn value frominteger functionsTemporaries(not preservedacross procedurecalls)Callee savedFrame pointer, orcallee saved$16$17$18$19$20$21$22$23$24$25$26$27$28$29$30$31a0a1a2a3a4a5t8t9t10t11rapv,t12ATgpspzeroInteger argumentsTemporariesCurrent proc addr or TempAlways zeroGlobal pointerStack pointerReserved for assemblerReturn addressCS 740 F’07–4–Instruction FormatsArithmetic Operations:• all register operands–addq $1, $7, $5• with a literal operand–addq $1, 15, $5Branches:• a single source register–bne $1, labelJumps:• one source, one dest reg–jsr $26, $1, hintLoads & Stores:• ldq $1, 16($30)Opcode Ra Rb RcFuncSBZ 06531755Opcode Ra Lit RcFunc1681755Opcode Ra6215DisplacementOpcode Ra Rb Hint65516Opcode Ra Rb Offset65516Page 2CS 740 F’07–5–Returning a Value from a ProcedurePlace result in $0long inttest2(long int x, long int y){return (x+x+x) - (y+y+y);}Compiled to Assembly.align 3.globl test2.ent test2test2:.frame $30,0,$26,0.prologue 0addq $16,$16,$1addq $1,$16,$1addq $17,$17,$0addq $0,$17,$0subq $1,$0,$0ret $31,($26),1.end test2C CodeCS 740 F’07–6–Pointer ExamplesC Codelong intiaddp(long int *xp,long int *yp){int x = *xp;int y = *yp;return x + y; }Annotated Assemblyiaddp:ldq $1,0($16) # $1 = *xpldq $0,0($17) # $0 = *ypaddq $1,$0,$0 # return with a ret $31,($26),1 # value x + yvoid incr(long int *sum, long int v){long int old = *sum;long int new = old+val;*sum = new;}incr:ldq $1,0($16) # $1 = *sumaddq $1,$17,$1 # $1 += vstq $1,0($16) # *sum = $1ret $31,($26),1 # returnCS 740 F’07–7–Array IndexingC Codelong intarefl(long int a[], long int i){return a[i];}Annotated Assemblyarefl:s8addq $17,$16,$17 # $17 = 8*i + &a[0]ldq $0,0($17) # return val = a[i]ret $31,($26),1 # returnintarefi(int a[], long int i){return a[i];}arefi:s4addq $17,$16,$17 # $17 = 4*i + &a[0]ldl $0,0($17) # return val = a[i]ret $31,($26),1 # returnCS 740 F’07–8–BranchesConditional BranchesbCond Ra, label– Cond : branch condition, relative to zerobeq Equal Ra == 0bne Not Equal Ra != 0bgt Greater Than Ra > 0bge Greater Than or Equal Ra >= 0blt Less Than Ra < 0ble Less Than or Equal Ra <= 0• Register value is typically set by a comparisoninstructionUnconditional Branchesbr labelPage 3CS 740 F’07–9–Conditional BranchesComparison Instructions•Format: cmpCond Ra, Rb, Rc–Cond: comparison condition, Ra relative to Rbcmpeq Equal Rc = (Ra == Rb)cmplt Less Than Rc = (Ra < Rb)cmple Less Than or Equal Rc = (Ra <= Rb)cmpult Unsigned Less Than Rc = (uRa < uRb)cmpule Unsigned Less Than or Equal Rc = (uRa <= uRb)long intcondbr(long int x, long int y){long int v = 0;if (x > y)v = x+x+x+y;return v;}condbr:bis $31,$31,$0 # v = 0cmple $16,$17,$1 # (x <= y)?bne $1,$45 # if so, branchaddq $16,$16,$0 # v = x+xaddq $0,$16,$0 # v += xaddq $0,$17,$0 # v += y$45:ret $31,($26),1 # return vC Code Annotated AssemblyCS 740 F’07–10–Conditional Move InstructionsMotivation: • conditional branches tend to disrupt pipelining & hurt performanceBasic Idea:• conditional moves can replace branches in some cases– avoids disrupting the flow of controlMechanism:cmovCond Ra, Rb, Rc•Cond: comparison condition, Ra is compared with zero– same conditions as a conditional branch (eq, ne, gt, ge, lt, le)• if (Ra Cond zero), then copy Rb into RcPsuedo-code example:if (x > 0) z = y; => cmovgt x, y, zCS 740 F’07–11–JumpsCharacteristics:• transfer of control is unconditional• target address is specified by a registerFormat:jmp Ra,(Rb),Hint• Rb contains the target address• for now, don’t worry about the meaning of Ra or “Hint”• synonyms for jmp: jsr, retCS 740 F’07–12–Procedure Calls & ReturnsMaintain the return address in a special register ($26)Procedure call:• bsr $26, label Save return addr in $26, branch to label• jsr $26, (Ra) Save return addr in $26, jump to address in RaProcedure return:• ret $31, ($26) Jump to address in $26long int caller(){ return callee(); }long int callee(){ return 5L; }caller:...0x800 bsr $26,callee # save return addr (0x804) in0x804 ... # $26, branch to callee...callee:0x918 bis $31,5,$0 # return value = 50x91c ret $31,($26),1 # jump to addr in $26C Code Annotated
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