Integrated Predicated and Speculative Execution in the IMPACT EPICArchitectureDavid I. August Daniel A. Connors Scott A. MahlkeyJohn W. Sias Kevin M. CrozierBen-Chung Cheng Patrick R. Eaton Qudus B. Olaniran Wen-mei W. HwuCenter for Reliable and High-Performance ComputingyHewlett-Packard LaboratoriesUniversity of Illinois Hewlett-PackardUrbana-Champaign, IL 61801 Palo Alto, CA 94304faugust, dconnors, sias, crozier, bccheng, eaton, mrq, [email protected] [email protected] Parallel Instruction Computing (EPIC) architecturesrequire the compiler to express program instruction level paral-lelism directly to the hardware. EPIC techniques which enable thecompiler to represent control speculation, data dependence spec-ulation, and predication have individually been shown to be veryeffective. However, these techniques have not been studied in com-bination with each other. This paper presents the IMPACT EPICArchitecture to address the issues involved in designing processorsbased on these EPIC concepts. In particular, we focus on newexecution and recovery models in which microarchitectural sup-port for predicated execution is also used to enable efficient recov-ery from exceptions caused by speculatively executed instructions.This paper demonstrates that a coherent framework to integratethe three techniques can be elegantly designed to achieve muchbetter performance than each individual technique could aloneprovide.1. IntroductionThe performance of modern processors is increasingly depen-dent on their ability to execute multiple instructions per cycle.While mainstream microprocessors in 1990 executed at most oneinstruction per cycle [5][7], those in 1995 had the ability to executeup to four instructions per cycle [6]. By the year 2000, hardwaretechnology will be capable of producing microprocessors that ex-ecute up to sixteen instructions per clock cycle. Such rapid, dra-matic increases in hardware parallelism have placed tremendouspressure on compiler technology. Without appropriate instructionset architecture support, it can be very costly in terms of code sizeand compile time for the compiler to expose sufficient amountsof Instruction Level Parallelism (ILP) to the hardware. As a re-sult, an increasingly important aspect of computer architecture isto provide the compiler with means to control compile-time andrun-time costs while enhancing the amount of ILP visible to thehardware.The term Explicitly Parallel Instruction Computing (EPIC) wascoined recently by Hewlett Packard and Intel in their joint an-nouncement of the IA-64 instruction set [10]. It refers to archi-tectures in which features are provided to facilitate compiler en-hancements of ILP in all programs. It is natural to expect thatthe coming generation of EPIC architectures will have featuresto overcome the worst impediments to a compiler's ability to en-hance ILP: frequent control transfers and ambiguous memory de-pendences. Three such features have been proposed and studiedin the literature. Predication allows the compiler to overlap theexecution of independent control constructs without code explo-sion [12]. It also enables the compiler to reduce the frequency ofbranch instructions, to reduce branch mispredictions, and to per-form sophisticated control flow optimizations [16][19][23]. Pred-ication does this at the cost of increased fetch utilization. Controlspeculation allows the compiler to judiciously eliminate controldependences at the cost of increased register consumption and in-struction overhead [14][21]. Data dependence speculation enablesthe compiler to overcome ambiguous memory dependences, alsoat the cost of increased register consumption and instruction over-head [8][12].Although these three techniques have been studied individu-ally, issues involved in synthesizing a coherent architecture thatsupports all of them have not been addressed in the literature.In [16], the benefit of predication support was studied with a pred-ication compiler. However, the accompanying control speculationmodel, based on silent instructions, did not precisely detect all ex-ceptions. Sentinel speculation was introduced in [14] to provideaccurate detection of and recovery from exceptions; however, thesentinel speculation model was not developed in the context of apredicated architecture. [8] presented a compiler-directed data de-pendence speculation model based on the Memory Conflict Buffer(MCB). However, the model was not defined in the context of apredicated architecture. Furthermore, it used silent instructions toeliminate spurious exceptions caused by data speculative memoryloads and their dependent instructions, preventing accurate detec-tion of and recovery from all exceptions.The primary contribution of this paper is the new IMPACTEPIC Architecture framework that elegantly supports all three fea-tures. A machine based on the IMPACT EPIC Architecture frame-work will allow the compiler to achieve several key improvementssurpassing the current state of the art. First, the compiler can spec-ulate both control and data flow in predicated code without intro-ducing spurious exceptions, data page faults, Translation Look-aside Buffer (TLB) misses, or long latency cache misses. Second,the microarchitectural support required by predicated instructionscan also be used to support inline recovery for both control anddata speculation. Third, a single recovery model can be used forboth control and data speculation, simplifying the compiler codegeneration scheme.The secondary contribution of this paper is to present somepreliminary experimental results based on a prototype compiler forthe IMPACT EPIC Architecture and initial insights into the perfor-mance characteristics of the architecture. These results will showthat combining control speculation, data dependence speculation,and predicated execution into a coherent architecture provides asignificantly greater performance potential than any one of thesetechniques alone could provide, and that an efficient mechanismcan be designed for detection of and recovery from speculativeexceptions in such an architecture.2. Background and motivationThe three enabling features of the IMPACT EPICArchitecture—control speculation, data dependence specula-tion, and predicated execution—are examined in this section.First, the individual merits of each feature are presented. Then,the potential benefits of combining the features into a coherentarchitecture are described. A running example
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